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What is UM10114?

This electronic component, produced by the manufacturer "NXP Semiconductors", performs the same function as "LPC21xx and LPC22xx User manual".


UM10114 Datasheet PDF - NXP Semiconductors

Part Number UM10114
Description LPC21xx and LPC22xx User manual
Manufacturers NXP Semiconductors 
Logo NXP Semiconductors Logo 


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UM10114
LPC21xx and LPC22xx User manual
Rev. 03 — 2 April 2008
www.DataSheet4U.com
User manual
Document information
Info Content
Keywords
LPC2109/00, LPC2109/01, LPC2119, LPC2119/01, LPC2129,
LPC2129/01, LPC2114, LPC2114/01, LPC2124, LPC2124/01, LPC2194,
LPC2194/01, LPC2210, LPC2220, LPC2210/01, LPC2212, LPC2212/01,
LPC2214, LPC2214/01, LPC2290, LPC2290/01, LPC2292, LPC2292/01,
LPC2294, LPC2294/01, ARM, ARM7, 32-bit, Microcontroller
Abstract
User manual for LPC2109/19/29/14/24/94 and
LPC2210/20/12/14/90/92/94 including /01 parts

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UM10114 equivalent
NXP Semiconductors
UM10114www.DataSheet4U.com
Chapter 1: Introductory information
Up to 12 edge or level sensitive external interrupt pins available.
60 MHz maximum CPU clock available from programmable on-chip PLL with a
possible input frequency of 10 MHz to 25 MHz and a settling time of 100 ms.
For flashless LPC2210/20/90 only: 60 MHz (LPC2210/90), 72 MHz (LPC2290/01), or
75 MHz (LPC2210/01 and LPC2220) maximum CPU clock available from
programmable on-chip Phase-Locked Loop (PLL) with settling time of 100 μs.
On-chip integrated oscillator operates with an external crystal in the range from
1 MHz to 25 MHz and with an external oscillator up to 50 MHz.
Two power saving modes, Idle mode and Power-down mode.
Peripheral clock scaling and individual enable/disable of peripheral functions for
additional power optimization.
Processor wake-up from Power-down mode via external interrupt or CAN controllers.
Dual power supply:
CPU operating voltage range of 1.65 V to 1.95 V (1.8 V ± 8.3 %).
I/O power supply range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O pads.
3.2 Enhanced features
Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original
device. They also allow for a port pin to be read at any time regardless of its function.
Dedicated result registers for ADC reduce interrupt overhead. The ADC pads are 5 V
tolerant when configured for digital I/O function(s).
UART0/1 include fractional baud rate generator, auto-bauding capabilities, and
handshake flow-control fully implemented in hardware.
Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats.
SPI programmable data length and master mode enhancement.
General purpose timers can operate as external event counters.
4. Ordering options
UM10114_3
User manual
4.1 LPC2109/2119/2129
Table 2. LPC2109/2119/2129 Ordering information
Type number
Package
Name
Description
LPC2109FBD64/00 LQFP64
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
LPC2109FBD64/01 LQFP64
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
LPC2119FBD64
LQFP64
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
LPC2119FBD64/00 LQFP64
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
LPC2119FBD64/01 LQFP64
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
Version
SOT314-2
SOT314-2
SOT314-2
SOT314-2
SOT314-2
Rev. 03 — 2 April 2008
© NXP B.V. 2008. All rights reserved.
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