74LVC2G240 Datasheet PDF - NXP Semiconductors
Part Number | 74LVC2G240 | |
Description | Dual inverting buffer/line driver | |
Manufacturers | NXP Semiconductors | |
Logo | ||
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Dual inverting buffer/line driver; 3-state
Rev. 04 — 29 February 2008
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Product data sheet
1. General description
The 74LVC2G240 is a dual inverting buffer/line driver with 3-state outputs. The 3-state
outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH level at
pins nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger
action at all inputs makes the circuit highly tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the
74LVC2G240 as a translator in a mixed 3.3 V and 5 V environment.
It is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing a damaging backflow current through the device when it is
powered down.
2. Features
I Wide supply voltage range from 1.65 V to 5.5 V
I 5 V tolerant input/output for interfacing with 5 V logic
I High noise immunity
I Complies with JEDEC standard:
N JESD8-7 (1.65 V to 1.95 V)
N JESD8-5 (2.3 V to 2.7 V)
N JESD8-B/JESD36 (2.7 V to 3.6 V)
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I ±24 mA output drive (VCC = 3.0 V)
I CMOS low power consumption
I Latch-up performance exceeds 250 mA
I Direct interface with TTL levels
I Inputs accept voltages up to 5 V
I Multiple package options
I Specified from −40 °C to +85 °C and −40 °C to +125 °C
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NXP Semiconductors
74LVC2G240
www.DataSheet4U.com
Dual inverting buffer/line driver; 3-state
9. Recommended operating conditions
Table 6.
Symbol
VCC
VI
VO
Operating conditions
Parameter
supply voltage
input voltage
output voltage
Tamb
∆t/∆V
ambient temperature
input transition rise and fall rate
10. Static characteristics
Conditions
VCC = 1.65 V to 5.5 V;
Enable mode
VCC = 1.65 V to 5.5 V;
Disable mode
VCC = 0 V; Power-down mode
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
Min
1.65
0
0
0
0
−40
-
-
Max
5.5
5.5
VCC
5.5
5.5
+125
20
10
Unit
V
V
V
V
V
°C
ns/V
ns/V
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Tamb = −40 °C to +85 °C
VIH HIGH-level input voltage
VCC = 1.65 V to 1.95 V
0.65 × VCC
VCC = 2.3 V to 2.7 V
1.7
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
2.0
0.7 × VCC
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
-
-
VCC = 2.7 V to 3.6 V
-
VCC = 4.5 V to 5.5 V
-
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 µA; VCC = 1.65 V to 5.5 V
-
IO = 4 mA; VCC = 1.65 V
-
IO = 8 mA; VCC = 2.3 V
-
IO = 12 mA; VCC = 2.7 V
-
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
-
-
VOH HIGH-level output voltage VI = VIH or VIL
IO = −100 µA; VCC = 1.65 V to 5.5 V
VCC − 0.1
IO = −4 mA; VCC = 1.65 V
1.2
IO = −8 mA; VCC = 2.3 V
1.9
IO = −12 mA; VCC = 2.7 V
2.2
IO = −24 mA; VCC = 3.0 V
2.3
IO = −32 mA; VCC = 4.5 V
3.8
II
input leakage current
VI = 5.5 V or GND; VCC = 0 V to 5.5 V
-
Typ[1] Max
--
--
--
--
- 0.35 × VCC
- 0.7
- 0.8
- 0.3 × VCC
- 0.1
- 0.45
- 0.3
- 0.4
- 0.55
- 0.55
--
--
--
--
--
--
±0.1 ±5
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
74LVC2G240_4
Product data sheet
Rev. 04 — 29 February 2008
© NXP B.V. 2008. All rights reserved.
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