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PDF 74AUP1G125 Data sheet ( Hoja de datos )
| Número de pieza | 74AUP1G125 | |
| Descripción | Low-power buffer/line driver 3-state | |
| Fabricantes | NXP Semiconductors | |
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74AUP1G125
Low-power buffer/line driver; 3-state
Rev. 02 — 30 June 2006
www.DataSheet4U.com
Product data sheet
1. General description
The 74AUP1G125 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all
inputs makes the circuit tolerant to slower input rise and fall times across the entire
VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power
consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP1G125 provides the single non-inverting buffer/line driver with 3-state output.
The 3-state output is controlled by the output enable input (OE).
A HIGH level at pin OE causes the output to assume a high-impedance OFF-state. This
device has the input-disable feature, which allows floating input signals. The inputs are
disabled when OE is HIGH.
2. Features
I Wide supply voltage range from 0.8 V to 3.6 V
I High noise immunity
I Complies with JEDEC standards:
N JESD8-12 (0.8 V to 1.3 V)
N JESD8-11 (0.9 V to 1.65 V)
N JESD8-7 (1.2 V to 1.95 V)
N JESD8-5 (1.8 V to 2.7 V)
N JESD8-B (2.7 V to 3.6 V)
I ESD protection:
N HBM JESD22-A114-C Class 3A. Exceeds 5000 V
N MM JESD22-A115-A exceeds 200 V
N CDM JESD22-C101-C exceeds 1000 V
I Low static power consumption; ICC = 0.9 µA (maximum)
I Latch-up performance exceeds 100 mA per JESD 78 Class II
I Inputs accept voltages up to 3.6 V
I Low noise overshoot and undershoot < 10 % of VCC
I Input-disable feature allows floating input conditions
I IOFF circuitry provides partial Power-down mode operation
I Multiple package options
I Specified from −40 °C to +85 °C and −40 °C to +125 °C
1 page  
Philips Semiconductors
74AUP1G125www.DataSheet4U.com
Low-power buffer/line driver; 3-state
10. Static characteristics
Table 7: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ
Tamb = 25 °C
VIH HIGH-state input voltage
VCC = 0.8 V
VCC = 0.9 V to 1.95 V
0.70 × VCC -
0.65 × VCC -
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.6 -
2.0 -
VIL LOW-state input voltage VCC = 0.8 V
VCC = 0.9 V to 1.95 V
--
--
VCC = 2.3 V to 2.7 V
--
VCC = 3.0 V to 3.6 V
--
VOH HIGH-state output voltage VI = VIH or VIL
IO = −20 µA; VCC = 0.8 V to 3.6 V
IO = −1.1 mA; VCC = 1.1 V
IO = −1.7 mA; VCC = 1.4 V
IO = −1.9 mA; VCC = 1.65 V
IO = −2.3 mA; VCC = 2.3 V
IO = −3.1 mA; VCC = 2.3 V
IO = −2.7 mA; VCC = 3.0 V
IO = −4.0 mA; VCC = 3.0 V
VCC − 0.1 -
0.75 × VCC -
1.11 -
1.32 -
2.05 -
1.9 -
2.72 -
2.6 -
VOL LOW-state output voltage VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
IO = 1.1 mA; VCC = 1.1 V
--
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
--
--
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
--
--
IO = 2.7 mA; VCC = 3.0 V
--
IO = 4.0 mA; VCC = 3.0 V
--
II
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
IOZ 3-state output OFF-state VI = VIH or VIL; VO = 0 V to 3.6 V;
current
VCC = 0 V to 3.6 V
-
-
IOFF
∆IOFF
power-off leakage current
additional power-off
leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
-
-
-
-
ICC supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
--
Max Unit
-V
-V
-V
-V
0.30 × VCC V
0.35 × VCC V
0.7 V
0.9 V
-V
-V
-V
-V
-V
-V
-V
-V
0.1
0.3 × VCC
0.31
0.31
0.31
0.44
0.31
0.44
±0.1
±0.1
V
V
V
V
V
V
V
V
µA
µA
±0.2 µA
±0.2 µA
0.5 µA
74AUP1G125_2
Product data sheet
Rev. 02 — 30 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
5 of 21
5 Page 
Philips Semiconductors
74AUP1G125www.DataSheet4U.com
Low-power buffer/line driver; 3-state
Table 8: Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9
Symbol Parameter
Conditions
Tamb = 25 °C
CPD power dissipation capacitance f = 1 MHz; VI = GND to VCC
output enabled
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
Min
[2]
-
-
-
-
-
-
[1] All typical values are measured at nominal VCC.
[2] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
Typ [1] Max
Unit
2.7 -
2.8 -
2.9 -
3.0 -
3.6 -
4.2 -
pF
pF
pF
pF
pF
pF
Table 9: Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9
Symbol Parameter
Conditions
−40 °C to +85 °C
Min Max
−40 °C to +125 °C Unit
Min Max
CL = 5 pF
tPHL, tPLH
HIGH-to-LOW and
LOW-to-HIGH
propagation delay
A to Y
tPZH, tPZL
OFF-state to HIGH and
OFF-state to LOW
propagation delay
OE to Y
tPHZ, tPLZ
HIGH to OFF-state and
LOW to OFF-state
propagation delay
OE to Y
see Figure 7
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
see Figure 8
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
see Figure 8
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
2.5 11.7 2.5 12.9 ns
2.0 7.3 2.0 8.1 ns
1.7 6.1 1.7 6.7 ns
1.4 4.3 1.4 4.9 ns
1.2 3.9 1.2 4.4 ns
2.9 13.9 2.9 15.4 ns
2.3 7.7 2.3 8.3 ns
2.0 6.2 2.0 6.8 ns
1.7 4.5 1.7 5.0 ns
1.7 3.5 1.7 3.9 ns
2.7 7.3 2.7 8.2 ns
2.1 5.1 2.1 5.7 ns
2.0 5.0 2.0 5.7 ns
1.4 3.3 1.4 4.1 ns
1.7 3.4 1.7 3.9 ns
74AUP1G125_2
Product data sheet
Rev. 02 — 30 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
11 of 21
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| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet 74AUP1G125.PDF ] | |
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