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PDF UPD160062 Data sheet ( Hoja de datos )

Número de pieza UPD160062
Descripción 420-OUTPUT TFT-LCD SOURCE DRIVER
Fabricantes NEC 
Logotipo NEC Logotipo



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DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD160062www.DataSheet4U.com
420-OUTPUT TFT-LCD SOURCE DRIVER
(COMPATIBLE WITH 64-GRAY SCALE)
DESCRIPTION
The µ PD160062 is a source driver for TFT-LCDs capable of dealing with displays with 64-gray scale. Data input is
based on digital input configured as 6 bits by 6 dots (2 pixels), which can realize a full-color display of 260,000 colors
by output of 64 values γ -corrected by an internal D/A converter and 5-by-2 external power modules.
Because the output dynamic range is as large as VSS2 +0.1 V to VDD2 –0.1 V, level inversion operation of the LCD’s
common electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion, n-line inversion and
column line inversion when mounted on a single side, this source driver is equipped with a built-in 6-bit D/A converter
circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity.
Assuring a clock frequency of 45 MHz when driving at 2.3 V, this driver is applicable to SXGA+ standard TFT-LCD
panels.
FEATURES
• CMOS level input (2.3 to 3.6 V)
• 420 outputs
• Input of 6 bits (gray scale data) by 6 dots
• Capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a D/A converter (R-DAC)
• Logic power supply voltage (VDD1) : 2.3 to 3.6 V
• Driver power supply voltage (VDD2) : 8.0 to 9.0 V
• High-speed data transfer: fCLK = 45 MHz (internal data transfer speed when operating at VDD1 = 2.3 V)
• Output dynamic range VSS2 +0.1 V to VDD2 –0.1 V
• Apply for dot-line inversion, n-line inversion and column line inversion
• Output voltage polarity inversion function (POL)
• Input data inversion function (capable of controlling by each input port) (POL21, POL22)
• Current consumption control function (LPC, HPC, Bcont)
• Slim chip
ORDERING INFORMATION
Part Number
µ PD160062N-×××
Package
TCP (TAB package)
Remark The TCP’s external shape is customized. To order the required shape, please contact one of our sales
representatives.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. S16449EJ1V0DS00 (1st edition)
Date Published July 2003 NS CP(K)
Printed in Japan
2002

1 page




UPD160062 pdf
µ PD160062
Pin Symbol
V0 to V9
Pin Name
γ -corrected power
supplies
I/O
VDD1
VDD2
VSS1
VSS2
Logic power supply
Driver power supply
Logic ground
Driver ground
www.DataSheet4(U2./c2o)m
Description
Input the γ -corrected power supplies from outside by using operational amplifier.
Make sure to maintain the following relationships. During the gray scale voltage
output, be sure to keep the gray scale level power supply at a constant level.
VDD2 0.1 V V0 > V1 > V2 > V3 > V4 0.5 VDD2
0.5 VDD2 V5 > V6 > V7 > V8 > V9 VSS2 +0.1 V
2.3 to 3.6 V
8.0 to 9.0 V
Grounding
Grounding
Cautions 1. The power start sequence must be VDD1, logic input, and VDD2 & V0 to V9 in that order. Reverse
this sequence to shut down.
2. To stabilize the supply voltage, please be sure to insert a 0.1 µF bypass capacitor between
VDD1-VSS1 and VDD2-VSS2. Furthermore, for increased precision of the D/A converter, insertion of a
bypass capacitor of about 0.01 µF is also recommended between the γ -corrected power supply
terminals (V0, V1, V2, ···, V9) and VSS2.
Data Sheet S16449EJ1V0DS
5

5 Page





UPD160062 arduino
µ PD160062
9. CURRENT CONSUMPTION CONTROL FUNCTION
www.DataSheet4U.com
The µ PD160062 has a power control function which can switch the bias current of the output amplifier between four
levels and a bias control function (Bcont) which can be used to finely control the bias current.
< Power control function (LPC, HPC) >
The bias current of the output amplifier can be switched between four levels using LPC (Low Power Control) pins
and HPC (High Power Control) pins (show in below table).
Power Mode
High
Middle
Normal
Low
LPC
L
H or open
L
H or open
HPC
L
L
H or open
H or open
Following graph shows the relationship between each power modes and bias current.
High
Middle
Normal
Low
6.00
7.00
8.00
9.00
VDD2
Remark This relationship is founded on results of simulation and don’t assuring a characteristics of this product.
Data Sheet S16449EJ1V0DS
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