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Número de pieza | 74AUP2G17 | |
Descripción | Low-power dual Schmitt trigger | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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74AUP2G17
Low-power dual Schmitt trigger
Rev. 02 — 10 January 2008
Product data sheet
1. General description
The 74AUP2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage VT+ and the negative voltage VT− is defined as the input
hysteresis voltage VH.
2. Features
s Wide supply voltage range from 0.8 V to 3.6 V
s High noise immunity
s Complies with JEDEC standards:
x JESD8-12 (0.8 V to 1.3 V)
x JESD8-11 (0.9 V to 1.65 V)
x JESD8-7 (1.2 V to 1.95 V)
x JESD8-5 (1.8 V to 2.7 V)
x JESD8-B (2.7 V to 3.6 V)
s ESD protection:
x HBM JESD22-A114E Class 3A exceeds 5000 V
x MM JESD22-A115-A exceeds 200 V
x CDM JESD22-C101-C exceeds 1000 V
s Low static power consumption; ICC = 0.9 µA (maximum)
s Latch-up performance exceeds 100 mA per JESD 78 Class II
s Inputs accept voltages up to 3.6 V
s Low noise overshoot and undershoot < 10 % of VCC
s IOFF circuitry provides partial Power-down mode operation
s Multiple package options
s Specified from −40 °C to +85 °C and −40 °C to +125 °C
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74AUP2G17
Low-power dual Schmitt trigger
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
VOL LOW-level output voltage
II
IOFF
∆IOFF
ICC
input leakage current
power-off leakage current
additional power-off leakage
current
supply current
∆ICC
additional supply current
CI input capacitance
CO output capacitance
Tamb = −40 °C to +85 °C
VOH HIGH-level output voltage
VOL LOW-level output voltage
II input leakage current
IOFF power-off leakage current
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
VI or VO = 0 V to 3.6 V; VCC = 0 V
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
VI = VCC − 0.6 V; IO = 0 A;
VCC = 3.3 V
VI = GND or VCC; VCC = 0 V to 3.6 V
VO = GND; VCC = 0 V
VI = VIH or VIL
IO = −20 µA; VCC = 0.8 V to 3.6 V
IO = −1.1 mA; VCC = 1.1 V
IO = −1.7 mA; VCC = 1.4 V
IO = −1.9 mA; VCC = 1.65 V
IO = −2.3 mA; VCC = 2.3 V
IO = −3.1 mA; VCC = 2.3 V
IO = −2.7 mA; VCC = 3.0 V
IO = −4.0 mA; VCC = 3.0 V
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
VCC − 0.1
0.7 × VCC
1.03
1.30
1.97
1.85
2.67
2.55
-
-
-
-
-
-
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
1.1
1.8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max Unit
0.1
0.3 × VCC
0.31
0.31
0.31
0.44
0.31
0.44
±0.1
±0.2
±0.2
V
V
V
V
V
V
V
V
µA
µA
µA
0.5 µA
40 µA
- pF
- pF
-V
-V
-V
-V
-V
-V
-V
-V
0.1
0.3 × VCC
0.37
0.35
0.33
0.45
0.33
0.45
±0.5
±0.5
V
V
V
V
V
V
V
V
µA
µA
74AUP2G17_2
Product data sheet
Rev. 02 — 10 January 2008
© NXP B.V. 2008. All rights reserved.
5 of 18
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74AUP2G17
Low-power dual Schmitt trigger
240
ICC
(µA)
160
001aad691
80
0
0 0.4 0.8 1.2 1.6 2.0
VI (V)
Fig 11. Typical transfer characteristics; VCC = 1.8 V
1200
ICC
(µA)
800
001aad692
400
0
0 1.0
Fig 12. Typical transfer characteristics; VCC = 3.0 V
2.0 3.0
VI (V)
74AUP2G17_2
Product data sheet
Rev. 02 — 10 January 2008
© NXP B.V. 2008. All rights reserved.
11 of 18
11 Page |
Páginas | Total 18 Páginas | |
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