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PDF 74AUP2G125 Data sheet ( Hoja de datos )
| Número de pieza | 74AUP2G125 | |
| Descripción | Low-power dual buffer/line driver | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74AUP2G125
Low-power dual buffer/line driver; 3-state
Rev. 10 — 8 February 2013
Product data sheet
1. General description
The 74AUP2G125 provides the dual non-inverting buffer/line driver with 3-state output.
The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOE
causes the output to assume a high-impedance OFF-state. This device has the
input-disable feature, which allows floating input signals. The inputs are disabled when the
output enable input nOE) is HIGH.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low
static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; ICC = 0.9 A (maximum)
Latch-up performance exceeds 100 mA per JESD78B Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
Input-disable feature allows floating input conditions
IOFF circuitry provides partial power-down mode operation
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
1 page  
NXP Semiconductors
74AUP2G125
Low-power dual buffer/line driver; 3-state
9. Recommended operating conditions
Table 6.
Symbol
VCC
VI
VO
Operating conditions
Parameter
supply voltage
input voltage
output voltage
Tamb
t/V
ambient temperature
input transition rise and fall rate
10. Static characteristics
Conditions
Active mode
Power-down mode; VCC = 0 V
VCC = 0.8 V to 3.6 V
Min Max Unit
0.8 3.6 V
0 3.6 V
0
VCC
V
0 3.6 V
40
+125
C
0 200 ns/V
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ
Tamb = 25 C
VIH HIGH-level input voltage
VCC = 0.8 V
0.70 VCC -
VCC = 0.9 V to 1.95 V
0.65 VCC -
VCC = 2.3 V to 2.7 V
1.6 -
VCC = 3.0 V to 3.6 V
2.0 -
VIL LOW-level input voltage VCC = 0.8 V
--
VCC = 0.9 V to 1.95 V
--
VCC = 2.3 V to 2.7 V
--
VCC = 3.0 V to 3.6 V
--
VOH HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VCC 0.1 -
0.75 VCC -
1.11 -
1.32 -
2.05 -
1.9 -
2.72 -
2.6 -
VOL LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 0.8 V to 3.6 V
-
-
IO = 1.1 mA; VCC = 1.1 V
--
IO = 1.7 mA; VCC = 1.4 V
--
IO = 1.9 mA; VCC = 1.65 V
--
IO = 2.3 mA; VCC = 2.3 V
--
IO = 3.1 mA; VCC = 2.3 V
--
IO = 2.7 mA; VCC = 3.0 V
--
IO = 4.0 mA; VCC = 3.0 V
--
Max Unit
-V
-V
-V
-V
0.30 VCC V
0.35 VCC V
0.7 V
0.9 V
-V
-V
-V
-V
-V
-V
-V
-V
0.1
0.3 VCC
0.31
0.31
0.31
0.44
0.31
0.44
V
V
V
V
V
V
V
V
74AUP2G125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 8 February 2013
© NXP B.V. 2013. All rights reserved.
5 of 24
5 Page 
NXP Semiconductors
74AUP2G125
Low-power dual buffer/line driver; 3-state
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.
Symbol Parameter
Conditions
25 C
Min Typ[1]
Max
tdis disable time
nOE to nY; see Figure 9
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
CL = 5 pF, 10 pF, 15 pF and 30 pF
CPD power dissipation output enabled; fi = 1 MHz;
capacitance
VI = GND to VCC
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
[4]
-
6.0
4.4
5.1
3.6
5.2
49.9 -
9.9 13.3
7.7 9.6
8.7 11.1
6.2 7.6
8.7 10.5
[5]
- 2.7 -
- 2.8 -
- 2.9 -
- 3.0 -
- 3.6 -
- 4.2 -
40 C to +125 C
Unit
Min Max
Max
(85 C) (125 C)
--
4.8 14.8
3.1 10.8
2.8 12.4
2.6 8.6
2.6 10.8
- ns
16.5 ns
12.1 ns
13.8 ns
9.6 ns
13.1 ns
--
--
--
--
--
--
- pF
- pF
- pF
- pF
- pF
- pF
[1] All typical values are measured at nominal VCC.
[2] tpd is the same as tPLH and tPHL.
[3] ten is the same as tPZH and tPZL.
[4] tdis is the same as tPHZ and tPLZ.
[5] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of the outputs.
74AUP2G125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 8 February 2013
© NXP B.V. 2013. All rights reserved.
11 of 24
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet 74AUP2G125.PDF ] | |
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