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PDF LM3000 Data sheet ( Hoja de datos )
| Número de pieza | LM3000 | |
| Descripción | Dual Synchronous Emulated Current Mode Controller | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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LM3000
July 2, 2009
Dual Synchronous Emulated Current-Mode Controller
General Description
The LM3000 is a dual output synchronous buck controller
which is designed to convert input voltages ranging from 3.3V
to 18.5V down to output voltages as low as 0.6V. The two
outputs switch at a constant programmable frequency of 200
kHz to 1.5 MHz, with the second output 180 degrees out of
phase from the first to minimize the input filter requirements.
The switching frequency can also be phase locked to an ex-
ternal frequency. A CLKOUT provides an external clock 90
degrees out of phase with the main clock so that a second
chip can be run out of phase with the main chip. The emulated
current-mode control utilizes bottom side FET sensing to pro-
vide fast transient response and current limit without the need
for external current sense resistors or RC networks. Separate
Enable, Soft-Start and Track pins allow each output to be
controlled independently to provide maximum flexibility in de-
signing system power sequencing.
The LM3000 has a full range of protection features which in-
clude input under-voltage lock-out (UVLO), power good
(PGOOD) signals for each output, over-voltage crowbar and
hiccup mode during short circuit events.
Features
■ VIN range from 3.3V to 18.5V
■ Output voltage from 0.6V to 80% of VIN
■ Remote differential output voltage sensing
■ 1% accuracy at FB pin
■ Interleaved operation reduces input capacitors
■ Frequency sync/adjust from 200 kHz to 1.5 MHz
■ Startup with pre-bias load
■ Independent power good, enable, soft-start and track
■ Programmable current limit without external sense resistor
■ Hiccup mode short circuit protection
Applications
■ DC Power Distribution Systems
■ Graphic Cards - GPU and Memory ICs
■ FPGA, CPLD, and ASICs
■ Embedded Processor
■ 1.8V and 2.5V I/O Supplies
■ Networking Equipment (Routers, Hubs)
Simplified Application
© 2009 National Semiconductor Corporation 300905
300905a1
www.national.com
1 page  
Symbol
Parameter
OwSwCwI.LDLaAtaTSOheRet4U.com
Condition
fSW Switching Frequency
RFRQ = 100 kΩ
RFRQ = 42.2 kΩ
VSYNC
Threshold for Synchronization at the
FREQ/SYNC Pin
RFRQ = 10 kΩ
Rising
Falling
fSYNC
SYNC Range
tSYNC
SYNC Pulse Width
tSYNC-TRS
SYNC Rise/Fall Time
DMAX
Maximum Duty cycle
ERROR AMPLIFIER
IFB
ISOURCE
ISINK
VCOMP-HI
VCOMP-LO
VOS-TRK
gm
fBW
FB Pin Bias Current
COMP Pin Source Current
COMP Pin Sink Current
COMP Pin Voltage High Clamp
COMP Pin Voltage Low Clamp
Offset Using TRK Pin
Transconductance
Unity Gain Bandwidth Frequency
FB = 0.6V
FB = 0.5V, COMP = 1.0V
FB = 0.7V, COMP = 0.7V
TRK = 0.45V
INTERNAL VOLTAGE REGULATOR
VVDD
VVDD-ON
Internal Core Regulator Voltage
UVLO Thresholds
No External Load
VDD Rising
Hysteresis
VVDD-DO
Internal Core Regulator Dropout Voltage No External Load
IVDD-ILIM
Internal Core Regulator Current Limit VDD Short to Ground
VVDR
Regulator for External MOSFET Drivers IVDR = 100 mA
VVDR-DO
Driver Regulator Dropout Voltage
IVDR = 100 mA
IVDR-ILIM
Driver Regulator Current Limit
VDR Short to Ground
PGOOD OUTPUT
RPG-ON
PGOOD On-Resistance
IOH PGOOD High Leakage Current
THERMAL RESISTANCE
FB1 = FB2 = 0.47V
VPGOOD = 5V
θJA Junction-to-Ambient Thermal
Resistance
LLP-32 Package (Note 5)
Min Typ Max Units
230 kHz
425 500 575 kHz
1550
kHz
2.2 V
0.6
200 1500 kHz
100 ns
10 ns
85 %
20 nA
80 µA
80 µA
2.80 3.0 3.2
V
0.48 V
-9.0 0 9.0 mV
1400
µS
10 MHz
5.15 V
2.12 V
0.14
1.1 V
80 mA
5.2 V
1.0 V
450 mA
250 Ω
100 nA
26.4 °C/W
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. Operating Range conditions indicate the conditions at which the device is functional and the device should
not be operated beyond such conditions. For guaranteed specifications and conditions, see the Electrical Characteristics table.
Note 2: Human Body Model (HBM) is 100 pF capacitor discharged through a 1.5k resistor into each pin. Applicable standard is JESD22-A114C.
Note 3: VDD and VDR are outputs of the internal linear regulator. Under normal operating conditions where VIN > 5.5V, they must not be tied to any external
voltage source. In an application where VIN is between 3.3V to 5.5V, it is recommended to tie the VDD, VDR and VIN pins together, especially when VIN may
drop below 4.5V. In order to have better noise rejection under these conditions, a 10Ω, 1μF input filter may be used for the VDD pin.
Note 4: HG1, HG2, LG1, LG2 and CLKOUT are all output pins and should not be tied to any external power supply. COMP1 and COMP2 are also outputs and
should not be tied to any lower output impedance power source. PGOOD1 and PGOOD2 are open drain outputs, with a pull-down resistance of about 250Ω.
Each of them may be tied to an external voltage source less than 5.5V through an external resister greater than 3kΩ, although 10kΩ and above are preferred to
reduce the necessary signal ground current.
Note 5: Tested on a four layer JEDEC board. Four vias provided under the exposed pad. See JEDEC standards JESD51-5 and JESD51-7.
5 www.national.com
5 Page 
Alternatively, the tracking feature can be used to create equal
wwslwe.wDaratateSshefoert4thUe.coumtput voltages. In order to track properly,
use the highest output voltage to control the slew rate. In this
case, the tracking resistors are found from:
Again, a value of 10 kΩ 1% is recommended for RT1. For the
example case of VOUT1 = 5V and VOUT2 = 1.8V, RT2 is 17.8
kΩ 1%. A timing diagram for the case of equal slew rates is
shown in Figure 3.
Either method ensures that the output voltage of the tracking
supply always reaches regulation before the output voltage of
the controlling supply.
30090594
FIGURE 5. Tracking a Master Supply with Equal Start
Time
For equal slew rates, the circuit of Figure 6 is used. The re-
lationship for the tracking divider is set by:
30090526
FIGURE 3. Tracking with Equal Slew Rates
The LM3000 can track the output of a master power supply
by connecting a resistor divider to the TRK pins as shown in
Figure 4. For equal start times, the tracking resistors are de-
termined by:
30090595
FIGURE 6. Tracking a Master Supply with Equal Slew
Rates
30090591
FIGURE 4. Tracking a Master Supply with Equal Start
Time
11
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11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet LM3000.PDF ] | |
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