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PDF STMPE321 Data sheet ( Hoja de datos )
| Número de pieza | STMPE321 | |
| Descripción | 3-channel capacitive touch key controller | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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STMPE321
3-channel capacitive touch key controller
Features
■ Up to 3 GPIOs
■ Up to 3 capacitive touch key inputs
■ Operating voltage 1.65 - 1.95 V
■ Internal regulator
■ Interrupt output pin
■ I2C interface (1.8 V operation, 3.3 V tolerant)
■ 8 kV HBM ESD protection
■ 40 fF resolution, 128-step capacitance
measurement
■ Advanced data filtering (AFS)
■ Environment tracking calibration (ETC)
■ Individually adjustable touch variance (TVR)
settings for all channels
■ Adjustable environmental variance (EVR) for
optimal calibration
■ Capacitive key sensing capability in 27 µA
sleep mode
Applications
■ Mobile phones and smartphones
■ Portable media players
■ Game consoles
QFN12
(2.2 x 1.5 mm)
Description
The STMPE321 is a 3-channel capacitive touch
key controller. Capacitance measurement is
implemented in fully optimized hardware.
All 3 I/Os can be configured via an I2C bus to
function as either capacitive touch key, or as
GPIOs (general purpose I/O).
Table 1. Device summary
Order code
STMPE321QTR
June 2009
Package
QFN12 (2.2 x 1.5 mm)
Doc ID 15791 Rev 1
Packing
Tape and reel
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STMPE321 functional overview
1.3 STMPE321 typical application
The STMPE321 is capable of supporting capacitive sensors of up to 8 channels.
Figure 3. Typical application diagram
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I2C interface
Table 4.
Mode
Read
Write
Operation modes
Byte
Programming sequence
Start, Device address, R/W = 0, Register address to be read
Restart, Device address, R/W = 1, Data Read, STOP
If no Stop is issued, the Data Read can be continuously performed. If
the register address falls within the range that allows an address auto-
≥1 increment, then the register address auto-increments internally after
every byte of data being read. For those register addresses that fall
within a non-incremental address range, the address is kept static
throughout the entire write operations. Refer to the memory map table
for the address ranges that are auto and non-increment. An example
of such a non-increment address is FIFO.
Start, Device address, R/W = 0, Register address to be written, Data
Write, Stop
If no Stop is issued, the Data Write can be continuously performed. If
the register address falls within the range that allows address auto-
≥1 increment, then the register address auto-increments internally after
every byte of data being written in. For those register addresses that
fall within a non-incremental address range, the address is kept static
throughout the entire write operations. Refer to the memory map table
for the address ranges that are auto and non-increment.
Figure 6. Read and write modes (random and sequential)
One byte
Read
Device
Address
Reg
Address
Device
Address
Data
Read
More than one byte
Read
Device
Address
Reg
Address
Device
Address
Data
Read
Data
Read + 1
Data
Read + 2
One byte
Write
Device
Address
More than one byte
Read
Device
Address
Reg
Address
Data
to be
written
Reg
Address
Data to
Write
Data to
Write + 1
Data to
Write + 2
Master
Slave
Doc ID 15791 Rev 1
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet STMPE321.PDF ] | |
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