74HC02 Datasheet PDF - NXP Semiconductors
Part Number | 74HC02 | |
Description | Quad 2-input NOR gate | |
Manufacturers | NXP Semiconductors | |
Logo | ||
There is a preview and 74HC02 download ( pdf file ) link at the bottom of this page. Total 15 Pages |
Preview 1 page No Preview Available ! 74HC02; 74HCT02
Quad 2-input NOR gate
Rev. 5 — 26 November 2015
Product data sheet
1. General description
The 74HC02; 74HCT02 is a quad 2-input NOR gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
2. Features and benefits
Input levels:
For 74HC02: CMOS level
For 74HCT02: TTL level
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74HC02D
40 C to +125 C
74HCT02D
74HC02DB 40 C to +125 C
74HCT02DB
74HC02PW 40 C to +125 C
74HCT02PW
74HC02BQ 40 C to +125 C
74HCT02BQ
Name
SO14
SSOP14
TSSOP14
DHVQFN14
Description
plastic small outline package; 14 leads; body width
3.9 mm
Version
SOT108-1
plastic shrink small outline package; 14 leads; body SOT337-1
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
|
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NXP Semiconductors
74HC02; 74HCT02
Quad 2-input NOR gate
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HCT02
VIH HIGH-level VCC = 4.5 V to 5.5 V
input voltage
2.0 1.6 -
2.0
-
2.0
-V
VIL LOW-level VCC = 4.5 V to 5.5 V
input voltage
- 1.2 0.8
-
0.8
-
0.8 V
VOH
VOL
II
ICC
ICC
CI
HIGH-level
output voltage
LOW-level
output voltage
input leakage
current
supply current
additional
supply current
input
capacitance
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
IO = 4.0 mA
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
IO = 5.2 mA
VI = VCC or GND;
VCC = 5.5 V
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
per input pin;
VI = VCC 2.1 V; IO = 0 A;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
4.4
3.98
-
-
-
-
-
-
4.5
4.32
0
0.15
-
-
150
3.5
-
-
0.1
0.26
0.1
2.0
540
-
4.4
3.84
-
-
-
-
-
-
-
-
0.1
0.33
1
20
675
-
4.4
3.7
-
-
-
-
-
-
-V
-V
0.1 V
0.4 V
1 A
40 A
735 A
- pF
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circuit see Figure 7.
Symbol Parameter
Conditions
74HC02
tpd propagation delay nA, nB to nY; see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
tt
transition time
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
CPD power dissipation per package; VI = GND to VCC
capacitance
25 C
40 C to +125 C Unit
Min Typ Max Max
Max
(85 C) (125 C)
[1]
-
-
-
-
[2]
-
-
-
[3] -
25 90 115
9 18 23
7-
-
7 15 20
19 75
7 15
6 13
22 -
95
19
16
-
135 ns
27 ns
- ns
23 ns
110 ns
22 ns
19 ns
- pF
74HC_HCT02
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 26 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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