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PDF STA333BWQS Data sheet ( Hoja de datos )
| Número de pieza | STA333BWQS | |
| Descripción | 2.1-channel high-efficiency digital audio system | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STA333BWQS
2.1-channel high-efficiency digital audio system
with QSound QHD®
Features
! Wide supply voltage range (4.5 to 20 V)
! 3 power output configurations
– 2 channels of ternary PWM (stereo mode)
(2 x 20 W @ 8 Ω, 18 V).
– 3 channels - left, right using binary and LFE
using ternary PWM (2.1 mode) (2 x 9 W +
1 x 20 W @ 2 x 4 Ω, 1 x 8 Ω, 18 V)
– 2 channels of ternary PWM (2 x 20 W) +
stereo line out ternary
! 2.1 channels of 24-bit DDX®
! 100-dB SNR and dynamic range
! Selectable 32 kHz to 192 kHz input sample
rates
! I2C control with selectable device address
! Digital gain/attenuation +48 dB to -80 dB in
0.5-dB steps
! Soft volume update
! Individual channel and master gain/attenuation
! Dual independent limiters/compressors
! Dynamic range compression or anti-clipping
modes
! AutoModes
– 15 preset crossover filters
– 2 preset anti-clipping modes
– Preset night-time listening mode
! Individual channel and master soft and hard
mute
! Independent channel volume and DSP bypass
! Automatic zero-detect mute
PowerSSO-36
slug down
! Automatic invalid input detect mute
! 2-channel I2S input data interface
! Input and output channel mapping
! 4 x 28-bit user programmable biquads (EQ) per
channel
! Bass/treble tone control
! DC blocking selectable high-pass filter
! Selectable de-emphasis
! Sub channel mix into left and right channels
! Advanced AM interference frequency
switching and noise-suppression modes
! Selectable high or low bandwidth
noise-shaping topologies
! Variable max power correction for lower
full-power THD
! Thermal overload and short-circuit protection
! Video application supports 576 x fs input mode
! QSound QHD®
– Field proven stereo soundfield
enhancement technology
– Provides improved audio image width,
seperation and depth for stereo signals
– Synthesizes a 3-D stereo soundfield
! PowerSSO-36 slug down package
Table 1. Device summary
Order codes
STA333BWQS
STA333BWQS13TR
Package
PowerSSO-36 slug down
PowerSSO-36 slug down
Packaging
Tube
Tape and reel
March 2008
Rev 1
1/71
www.st.com
1
1 page  
STA333BWQS
Contents
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6.13
6.14
6.15
6.16
6.12.1 Coefficient address register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
6.12.2 Coefficient b1 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 52
6.12.3 Coefficient b1 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.12.4 Coefficient b1 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.12.5 Coefficient b2 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.12.6 Coefficient b2 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.12.7 Coefficient b2 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.12.8 Coefficient a1 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.12.9 Coefficient a1 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.12.10 Coefficient a1 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.12.11 Coefficient a2 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.12.12 Coefficient a2 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.12.13 Coefficient a2 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.12.14 Coefficient b0 data register bits 23:16 . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.12.15 Coefficient b0 data register bits 15:8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.12.16 Coefficient b0 data register bits 7:0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.12.17 Coefficient write/read control register . . . . . . . . . . . . . . . . . . . . . . . . . . 55
6.12.18 User-defined EQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
6.12.19 Pre-scale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
6.12.20 Post-scale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
6.12.21 Over-current post-scale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Variable max power correction registers (0x27 to 0x28) . . . . . . . . . . . . . 59
Variable distortion compensation registers (0x29 to 0x2A) . . . . . . . . . . . 59
Fault detect recovery constant registers (0x2B to 0x2C) . . . . . . . . . . . . . 59
Device status register (0x2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
7 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
7.1 Application scheme for power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . 61
7.2 PLL filter schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
7.3 Typical output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
8 Characterization data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
9 Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
10 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
5/71
5 Page 
STA333BWQS
Figure 1. Block diagram
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I2S
interface
I2C
Volume
control
DDX
Power
control
PLL
Digital (DSP)
Overview
Protection
current/thermal
Channel
1A
Logic
Channel
1B
Regulators
Bias
Channel
2A
Channel
2B
Power
11/71
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet STA333BWQS.PDF ] | |
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