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PDF KT0801 Data sheet ( Hoja de datos )

Número de pieza KT0801
Descripción Monolithic Digital Stereo FM Transmitter Radio Station On A Chip
Fabricantes KTMicro 
Logotipo KTMicro Logotipo



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No Preview Available ! KT0801 Hoja de datos, Descripción, Manual

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Monolithic Digital Stereo FM Transmitter
Radio-Station-on-a-Chip™
KT0801
ƒ Features
Professional Grade System-on-a-Chip (SoC) High-
Fidelity Stereo Audio FM Transmitter:
SNR 68 dB
Stereo Separation > 50dB
International compatible 76MHz ~ 108MHz
Minimal External Component Requirement:
Crystal optional (in lieu of direct feeding
of an external clock)
Ultra-Low Power Consumption:
< 12.6 mA operation current
< 1 µA standby current
Dual Reference Clock Setup:
Supports both 7.6MHz and 15.2MHz
Small Form factor:
24-pin 4x4x0.9 mm QFN (Pb-free and
RoHS Compliant)
Simple Interface:
Single 1.8V (in lieu of 1.6~3.6V regulator
feed)
Industry standard 2-wire I2C MCU
interface compatible
Advanced Digital Audio Signal Processing:
On-chip 20-bit ΔΣ Audio ADC
On-chip DSP core
On-chip 24dB PGA
Automatic calibration against process
and temperature
On-Chip LDO (low-drop-out) regulator:
Accommodates 1.6V ~ 3.6V supply
Programmable transmit level
Programmable pre-emphasis (50/75 µs)
Applications
MP3 Players
Cellular Phones
PDAs
Portable Personal Media player
Laptop Computers
Wireless Speakers
Rev. 1.0
Information furnished by KT Micro is believed to be accurate
and reliable. However, no responsibility is assumed by KT
Micro for its use, nor for any infringements of patents or
other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any
patent or patent rights of KT Micro.
Left In
Right In
KTAT0801 Block Diagram
PGA/ADC
PGA/ADC
Pre-Emph
Pre-Emph
Digital MPX
Xtal1
Xtal2
XTAL
KTM proprietary
Frequency Synthesizer
& FM modulator
SDA
SCL
I2C
Bandgap &
Reference
Channel
Selector
Control
Register
Calibration
RF
Power
Amp
Figure 1: KT0801 System Diagram
RF Out
ƒ General Description
The KT Micro KT0801 Monolithic Digital FM Transmitter
is designed to process high-fidelity stereo audio signal and
transmit modulated FM signal over a short range. The
modulated stereo FM signal can be intercepted and played
back using any FM radio worldwide.
The KT0801 features dual 20-bit ΔΣ audio ADCs, a high-
fidelity digital stereo audio processor and a fully integrated
radio frequency (RF) transmitter. An on-chip low-drop-out
regulator (LDO) allows the chip to be integrated in a wide
range of low-voltage battery-operated systems with power
supply ranging from 1.6V to 3.6V.
The KT0801 is configured as an I2C slave and programmed
through the industry standard 2-wire MCU interface.
Thanks to its high integration level, the KT0801 is mounted
in a generic 24-pin 4x4 QFN package and only requires a
single low-voltage supply and a small-form-factor crystal
(7.6MHz or 15.2MHz) or an external clock to operate.
No external tuning is required that makes design-in effort
minimum.
KT Micro Inc., 30211 Avenida De Las Banderas,
Suite 200, Rancho Santa Margarita, CA 92688
Tel: 949.766.6744
www.ktmicro.com
Fax: 949.766.6745 Copyright ©2006, KT Micro Inc.

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KT0801 pdf
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KT0801
ƒ I2C Compatible 2-Wire Serial Interface
General Descriptions
The serial interface consists of a serial controller and registers. An internal address decoder transfers the
content of the data into appropriate registers. Both the write and read operations are supported according to
the following protocol:
The write operation is accomplished via a 3-byte sequence:
Serial address with write command
Register address
Register data
The read operation is accomplished via a 4-byte sequence:
Serial address with write command
Register address
Serial address with read command
Register data
RANDOM REGISTER WRITE PROCEDURE
S 0 1 1 x 1 1 0 WA
7 bit address
register address
Acknowledge
START condition WRITE command
A
data
Acknowledge
AP
STOP condition
Acknowledge
RANDOM REGISTER READ PROCEDURE
S 0 1 1 x 1 1 0 WA
7 bit address
register address
Acknowledge
START condition WRITE command
AS 0 1 1 x 1 1 0 RA
7 bit address
data
Acknowledge
Acknowledge
READ condition
AP
NO Acknowledge
STOP condition
Figure 3: Serial Interface Protocol
The x is the optional 4th MSB bit address code that is set by the ADDR pin and is provided to allow a dual-
transmitter-single-controller configuration that will enable multi-channel surround sound applications.
ADDR must be externally tied to ground or IOVDD for low or high setup, respectively. The serial
controller supports slave mode only. Any register can be addressed randomly.
Slave Mode Protocol
With reference to the clocking scheme shown in Figure 4, the serial interface operates in the following
manner:
Copyright ©2006, KT Micro, Inc.

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