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PDF TMP1962C10BXBG Data sheet ( Hoja de datos )
| Número de pieza | TMP1962C10BXBG | |
| Descripción | 32-Bit RISC Microprocessor | |
| Fabricantes | Toshiba Semiconductor | |
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TMP1962C10BXBG
32-Bit RISC Microprocessor TX19 Family
TMP1962C10BXBG
1. Features
The TX19 is a family of high-performance 32-bit microprocessors that offers the speed of a 32-bit RISC
solution with the added advantage of a significantly reduced code size of a 16-bit architecture. The instruction set
of the TX19 includes as a subset the 32-bit instructions of the TX39, which is based on the MIPS R3000ATM
architecture. Additionally, the TX19 supports the MIPS16TM Application-Specific Extensions (ASE) for improved
code density.
www.DataSheet4U.com The TMP1962 is built on a TX19 core processor and a selection of intelligent peripherals. The TMP1962 is
suitable for low-voltage, low-power applications.
Features of the TMP1962 include the following:
(1) TX19 core processor
1) Two instruction set architecture (ISA) modes: 16-bit ISA for code density and 32-bit ISA for speed
• The 16-bit ISA is object-code compatible with the code-efficient MIPS16TM ASE.
• The 32-bit ISA is object-code compatible with the high-performance TX39 family.
2) Combines high performance with low power consumption.
• High performance
• Single clock cycle execution for most instructions
• 3-operand computational instructions for high instruction throughput
• 5-stage pipeline
030619EBP
• The information contained herein is subject to change without notice.
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of TOSHIBA or others.
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in
general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of
the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system,
and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunctionor
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any
law and regulations.
• For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled
Quality and Reliability Assurance/Handling Precautions.
TMP1962-1
2006-02-21
1 page  
www.DataSheet4U.com
TMP1962C10BXBG
TX19 Processor Core
TX19 CPU
MAC
DSU
1 Mbyte
Flash ROM
40 Kbyte
RAM
ROM correction
DMAC
(8ch)
INTC
8-bit TMRA
0/1 to A/B (12ch)
16-bit TMRB
0 to 3(4ch)
32-bit TMRC
TBT(1ch)
32-bit TMRC
Input Capture
0 to 7 (8ch)
32-bit TMRC
Compare
0 to 7 (8ch)
10-bit ADC (24ch)
SIO
0 to 6 (7ch)
I2C
(1ch)
CG
EBIF
I/O Bus I/F
PORT0
to
PORT6
(Shared with external bus
interface)
PORT7
to
PORT9
(Shared with ADC input)
PORTA
to
PORTL, PORTN
(Shared with functional
pins)
PORTM, PORTO
to
PORTP
(General-purpose ports)
KWUP
0 to D (14ch)
WDT
Figure 1.1 TMP1962 Block Diagram
TMP1962-5
2006-02-21
5 Page 
TMP1962C10BXBG
Table 2.2 Pin Names and Functions (4/6)
Pin Name
PE0
TXD5
PE1
RXD5
PE2
SCLK5
CTS5
PE3
KEY9
www.DataSheet4U.com
PE4
KEYA
Number
of Pins
1
1
1
1
Type
Input/Output
Output
Input/Output
Input
Input/Output
Input
Input
Input/Output
Input
1 Input/Output
Input
PE5
KEYB
1 Input/Output
Input
PE6
KEYC
1 Input/Output
Input
PE7
KEYD
1 Input/Output
Input
PF0
SO
SDA
1 Input/Output
Output
Input/Output
PF1 1 Input/Output
SI Input
SCL Input/Output
PF2
SCK
PF3
DREQ2
1 Input/Output
Input/Output
1 Input/Output
Input
PF4
DACK2
1 Input/Output
Output
PF5
DREQ3
1 Input/Output
Input
PF6
DACK3
1 Input/Output
Output
PF7 1 Input/Output
TBTIN
Input
PG0 - PG7
8 Input/Output
TC0IN - TC7IN
Input
PH0 - PH7
8 Input/Output
TCOUT0 - TCOUT7
Output
PJ0 1 Input/Output
INT0
Input
Function
Port E0: Programmable as input or output
Serial Transmit Data 5: Programmable as a push-pull or open-drain output
Port E1: Programmable as input or output
Serial Receive Data 5
Port E2: Programmable as input or output
Serial Clock Input/Output 5
Serial Clear-to-Send 5: Programmable as a push-pull or open-drain output
Port E3: Programmable as input or output
Key-Pressed Wake-up Input 9 (with internal pull-up resistor): Dynamic pull-up
selectable
Schmitt-triggered input
Port E4: Programmable as input or output
Key-Pressed Wake-up Input A (with internal pull-up resistor): Dynamic pull-up
selectable
Schmitt-triggered input
Port E5: Programmable as input or output
Key-Pressed Wake-up Input B (with internal pull-up resistor): Dynamic pull-up
selectable
Schmitt-triggered input
Port E6: Programmable as input or output
Key-Pressed Wake-up Input C (with internal pull-up resistor): Dynamic pull-up
selectable
Schmitt-triggered input
Port E7: Programmable as input or output
Key-Pressed Wake-up Input D (with internal pull-up resistor): Dynamic pull-up
selectable
Schmitt-triggered input
Port F0: Programmable as input or output
Data transmit pin when the Serial Bus Interface is in SIO mode
Data transmit/receive pin when the Serial Bus Interface is in I2C mode
Programmable as a push-pull or open-drain output
Schmitt-triggered input
Port F1: Programmable as input or output
Data receive pin when the Serial Bus Interface is in SIO mode
Clock input/output pin when the Serial Bus Interface is in I2C mode
Programmable as a push-pull or open-drain output
Schmitt-triggered input
Port F2: Programmable as input or output
Clock input/output pin when the Serial Bus Interface is in SIO mode
Port F3: Programmable as input or output
DMA Request 2: Asserted by an external input/output device to request DMA transfer
with DMAC2
Port F4: Programmable as input or output
DMA Acknowledge 2: Indicates acknowledgement for a DMA transfer request made
with DREQ2
Port F5: Programmable as input or output
DMA Request 3: Asserted by an external input/output device to request DMA transfer
with DMAC3
Port F6: Programmable as input or output
DMA Acknowledge 3: Indicates acknowledgement for a DMA transfer request made
with DREQ3
Port F7: Programmable as input or output
32-Bit Time Base Timer Input: Count input to the 32-bit time base timer
Port G: Individually programmable as input or output
32-Bit Timer Capture Trigger Input
Port H: Individually programmable as input or output
32-Bit Timer Compare Match Output
Port J0: Programmable as input or output
Interrupt Request 0: Programmable to be high-level, low-level, rising-edge or
falling-edge sensitive
Schmitt-triggered input
TMP1962-11
2006-02-21
11 Page | ||
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