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PDF GL828 Data sheet ( Hoja de datos )
| Número de pieza | GL828 | |
| Descripción | USB 2.0 SD/MMC Single Slot Card Reader Controller | |
| Fabricantes | GENESYS LOGIC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de GL828 (archivo pdf) en la parte inferior de esta página. Total 23 Páginas | ||
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Genesys Logic, Inc.
GL828
USB 2.0 SD/MMC Single Slot
Card Reader Controller
Datasheet
Revision 1.02
Dec. 28, 2006
1 page  
GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller
LIST OF FIGURES
FIGURE 3.2 - 48 PIN LQFP/LQFN PINOUT DIAGRAM ....................................................... 9
FIGURE 4.1 - BLOCK DIAGRAM ......................................................................................... 13
FIGURE 6.1 - EMBEDDED PMOS SWITCH ARCHITECTURE.............................................. 16
FIGURE 6.2 – V-I CURVE OF PMOS SWITCH @ 25 °C ..................................................... 16
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FIGURE 6.4 - TIMING DIAGRAM OF SECURE DIGITAL / MULTIMEDIACARD .................. 17
FIGURE 6.5 - TIMING DIAGRAM OF RESET WIDTH ........................................................... 18
FIGURE 6.6 - TIMING DIAGRAM OF POWER GOOD TO USB COMMAND RECEIVE READY 18
FIGURE 6.7 - TIMING DIAGRAM OF EEPROM 93C46 ..................................................... 19
FIGURE 7.1 - GL828 48 PIN LQFP PACKAGE................................................................... 21
FIGURE 7.2 - GL828 48 PIN LQFN PACKAGE .................................................................. 22
©2000-2006 Genesys Logic Inc. - All rights reserved.
Page 5
5 Page 
GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller
3.3 Pin Descriptions
Table 3.2 - Pin Descriptions
Pin name
VDD18O
GL828
LQFP48 Pin
4
Type
Description
P Internal regulator 1.8V output
GND
5,9,12
P Analog ground
AVDD 6,11 P Analog power
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DM 7 A USB D-
DP 8 A USB D+
RREF 10 A Reference resistor
X1
X2
DVDD
13
14
15,26,35
OSC 12MHz/48MHz input. This pin can be connected to one terminal of crystal or
external 12MHz/48MHz clock source.
OSC 12MHz/48MHz output. This is another terminal of the crystal or NC when
using an external 12MHz/48MHz clock source is used to drive PLL.
P Digital power 3.3V
GND
16,27,34
P Digital ground
VP5 25 P Regulator 5V Input
PMOSO
36 PMOS Power MOS 3.3V Output
TEST_MOD
17
I, pd Test mode selection
EXTRSTZ
18
I, pu External reset. It is active low. The low pulse should be 1 us width at least.
SD_CDZ
23 B/I, pd SD& MMC Card detection. Normal High, active low.
D0~D7
40,43,37,29,28,
SD data 0~3
B/I, f
30,32,38
MMC data 0~7
SD_CLK 39 B/I, f SD/MMC CLK
SD_WPZ
SD_CMD
3 B/I, pu SD Write Protect Detection. When no card is inserted, pull low. When SM or
SD card is inserted, the pin is pull up and active low.
41 B/I, f SD/MMC CMD
GPIO0~3
41,48,47,46 B/I, pd GPIO0~3 / GPIO3 : Power LED
SK 19 B/I, pd 93C46 Clock
CS 20 B/I, pd 93C46 CS
DO 21 B/I, pd 93C46 Data out
DI 22 B/I, pd 93C46 Data in / Access LED
Notation:
Type
A
B
B/I
B/O
I
Analog
Bi-directional
Bi-directional, default input
Bi-directional, default output
Input
©2000-2006 Genesys Logic Inc. - All rights reserved.
Page 11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet GL828.PDF ] | |
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