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PDF GL811S Data sheet ( Hoja de datos )
| Número de pieza | GL811S | |
| Descripción | USB 2.0 to ATA / ATAPI Bridge Controller | |
| Fabricantes | GENESYS LOGIC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de GL811S (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Genesys Logic, Inc.
GL811S
USB 2.0 to ATA/ATAPI
Bridge Controller
Datasheet
Revision 1.02
Apr. 13, 2007
1 page  
GL811S USB2.0 to ATA/ATAPI Bridge Controller
LIST OF FIGURES
FIGURE 3.1 - 48 PIN LQFP PINOUT DIAGRAM.................................................................... 9
FIGURE 3.2 - 64 PIN LQFP PINOUT DIAGRAM.................................................................. 10
FIGURE 4.1 - BLOCK DIAGRAM ......................................................................................... 16
FIGURE 6.1 - INITIATING A MULTIWORD DMA DATA BURST.......................................... 24
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FIGURE 6.2 - SUSTAINING A MULTIWORD DMA DATA BURST ........................................ 25
FIGURE 6.3 - DEVICE TERMINATING A MULTIWORD DMA DATA BURST....................... 25
FIGURE 6.4 - HOST TERMINATING A MULTIWORD DMA DATA BURST........................... 26
FIGURE 6.5 - INITIATING AN ULTRA DMA DATA-IN BURST ............................................ 28
FIGURE 6.6 - SUSTAINED ULTRA DMA DATA-IN BURST.................................................. 28
FIGURE 6.7 - HOST PAUSING AN ULTRA DMA DATA-IN BURST ...................................... 29
FIGURE 6.8 - DEVICE TERMINATING AN ULTRA DMA DATA-IN BURST ......................... 29
FIGURE 6.9 - HOST TERMINATING AN ULTRA DMA DATA-IN BURST............................. 30
FIGURE 6.10 - INITIATING AN ULTRA DMA DATA-OUT BURST ...................................... 31
FIGURE 6.11 - SUSTAINED ULTRA DMA DATA-OUT BURST ............................................ 31
FIGURE 6.12 - DEVICE PAUSING AN ULTRA DMA DATA-OUT BURST............................. 32
FIGURE 6.13 - HOST TERMINATING AN ULTRA DMA DATA-OUT BURST ......................... 33
FIGURE 6.14 - DEVICE TERMINATING AN ULTRA DMA DATA-OUT BURST.................... 34
FIGURE 7.1 – GL811S 48 PIN LQFP PACKAGE................................................................ 35
FIGURE 7.2 – GL811S 64 PIN LQFP PACKAGE................................................................ 36
©2007 Genesys Logic Inc. - All rights reserved.
Page 5
5 Page 
GL811S USB2.0 to ATA/ATAPI Bridge Controller
3.2 Pin List
Table 3.1 - 48 Pin List
Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type
1
2
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4
DD12
DD3
PIO0
DD11
B 13 HD_RST# O 25
XI
I 37 IORDY I
B 14 USB_PWR B 26 TEST
I 38 DIOR_ O
B 15 RESET# I 27 CS1_ O 39 DIOW_ O
B 16 AGND1 P 28 D_PWR_CTL B 40 DMARQ I
5 DD4 B 17 AVDD1 P 29 5V_IN P 41 DD15 B
6 DD10 B 18 DM B 30 3V3_OUT P 42 DVDD P
7 DVDD1 P 19 DP
B 31 CS0_ O 43 DD0 B
8 DD5 B 20 AGND2 P 32 DA2
O 44 DD14 B
9 DD9 B 21 VREF A 33 DA0 O 45 DD1 B
10 DD6 B 22 AVCC2 P 34 DA1
O 46 DD13 B
11 DD8 B 23 X-POWER P 35 INTRQ I 47 DD2 B
12 DD7 B 24 XO
B 36 DMACK_ O 48 GPIO1 B
Table 3.2 - 64 Pin List
Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type
1 DD12 B 17
2 DD3 B 18
NC
NC
33 XI
34 DGND
I 49
P 50
IORDY
NC
I
3 PIO2 B 19 NC
35 NC
51 DIOR_ O
4 PIO0 B 20 HD_RST# O 36 TEST I 52 DIOW_ O
5 PIO1 B 21 USB_PWR B 37 CS1_ O 53 DMARQ I
6
DD11
B 22 RESET# I 38 D_PWR_CTL B 54
DD15
B
7 DD4 B 23 DGND P 39 5V_IN P 55 DGND P
8 DD10 B 24 AGND P 40 DVDD P 56 DVDD P
9 DVDD P 25 AVDD3 P 41 CS0_
O 57
DD0
B
10 DGND P 26
DM
B 42
DA2
O 58 DD14
B
11 DD5
B 27
DP
B 43 U_RX
B 59
DD1
B
12 DD9
B 28 AGND1 P 44 U_TX
O 60 DD13
B
13 DD6
B 29 RREF
A 45
DA0
O 61
DD2
B
14 DD8
B 30 AVDD1 P 46
DA1
O 62 GPIO 1 B
©2007 Genesys Logic Inc. - All rights reserved.
Page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet GL811S.PDF ] | |
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