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PDF 11N06LT Data sheet ( Hoja de datos )
| Número de pieza | 11N06LT | |
| Descripción | PHB11N06LT | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHB11N06LT, PHD11N06LT
FEATURES
• ’Trench’ technology
• Very low on-state resistance
• Fast switching
www.DataShe•etS4Uta.cbolme off-state characteristics
• High thermal cycling performance
• Low thermal resistance
SYMBOL
g
d
s
QUICK REFERENCE DATA
VDSS = 55 V
ID = 11 A
RDS(ON) ≤ 150 mΩ (VGS = 5 V)
RDS(ON) ≤ 130 mΩ (VGS = 10 V)
GENERAL DESCRIPTION
N-channel enhancement mode, logic level, field-effect power transistor in a plastic envelope using ’trench’ technology.
The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching
applications.
The PHB11N06LT is supplied in the SOT404 surface mounting package.
The PHD11N06LT is supplied in the SOT428 surface mounting package.
PINNING
PIN DESCRIPTION
1 gate
SOT428
tab
SOT404
tab
2 drain 1
3 source
tab drain
2
13
2
13
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 kΩ
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
55
55
± 13
11
7.6
44
36
175
UNIT
V
V
V
A
A
A
W
˚C
1 It is not possible to make contact to pin 2 of the SOT404 or SOT428 package
September 1998
1
Rev 1.000
1 page  
Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHB11N06LT, PHD11N06LT
Drain current, ID (A)
10
VDS > ID x RDS(on)
8
www.DataSheet4U.com
6
PHB11N06LT
4
2 175 C
Tj = 25 C
0
012345
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj
8 Transconductance, gfs (S)
VDS > ID x RDS(on)
7
6
PHB11N06LT
Tj = 25 C
5
Tj = 175 C
4
3
2
1
0
0 2 4 6 8 10
Drain current, ID (A)
Fig.8. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID); conditions: VDS = 25 V
2.5 a
BUK959-60 Rds(on) normlised to 25degC
2
1.5
1
0.5
-100
-50
0 50 100 150 200
Tmb / degC
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 5.5 A; VGS = 5 V
VGS(TO) / V
2.5
max.
2
typ.
1.5
min.
1
BUK959-60
0.5
0
-100
-50
0 50
Tj / C
100 150 200
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
1E-01
Sub-Threshold Conduction
1E-02
1E-03
2% typ 98%
1E-04
1E-05
1E-05
0 0.5 1 1.5 2 2.5
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
3
1000 Capacitances, Ciss, Coss, Crss (pF)
PHB11N06LT
Ciss
100 Coss
Crss
10
0.1
1 10
Drain-source voltage, VDS (V)
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
September 1998
5
Rev 1.000
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 11N06LT.PDF ] | |
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