UT7C139 Datasheet PDF - Aeroflex Circuit Technology
Part Number | UT7C139 | |
Description | (UT7C138 / UT7C139) 4Kx8/9 Radiation-Hardened Dual-Port Static RAM | |
Manufacturers | Aeroflex Circuit Technology | |
Logo | ||
There is a preview and UT7C139 download ( pdf file ) link at the bottom of this page. Total 21 Pages |
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UT7C138/139 4Kx8/9 Radiation-Hardened
Dual-Port Static RAM with Busy Flag
Data Sheet
January 2002
FEATURES
q 45ns and 55ns maximum address access time
q Asynchronous operation for compatibility with industry-
www.DataSheet4U.sctoamndard 4K x 8/9 dual-port static RAM
q CMOS compatible inputs, TTL/CMOS compatible output
levels
q Three-state bidirectional data bus
q Low operating and standby current
q Radiation-hardened process and design; total dose
irradiation testing to MIL-STD-883 Method 1019
- Total-dose: 1.0E6 rads(Si)
- Memory Cell LET threshold: 85 MeV-cm2/mg
- Latchup immune (LET >100 MeV-cm2/mg)
q QML Q and QML V compliant part
q Packaging options:
- 68-lead Flatpack
- 68-pin PGA
q 5-volt operation
q Standard Microcircuit Drawing 5962-96845
R/ WL
CE L
OEL
INTRODUCTION
The UT7C138 and UT7C139 are high-speed radiation-
hardened CMOS 4K x 8 and 4K x 9 dual-port static RAMs.
Arbitration schemes are included on the UT7C138/139 to
handle situations when multiple processors access the same
memory location. Two ports provide independent,
asynchronous access for reads and writes to any location in
memory. The UT7C138/139 can be utilized as a stand-alone
32/36-Kbit dual-port static RAM or multiple devices can be
combined in order to function as a 16/18-bit or wider master/
slave dual-port static RAM. For applications that require
depth expansion, the BUSY pin is open-collector allowing
for wired OR circuit configuration. An M/S pin is provided
for implementing 16/18-bit or wider memory applications
without the need for separate master and slave devices or
additional discrete logic. Application areas include
interprocessor/multiprocessor designs, communications,
and status buffering.
Each port has independent control pins: chip enable (CE),
read or write enable (R/W), and output enable ( OE). BUSY
signals that the port is trying to access the same location
currently being accessed by the other port.
R/ WR
CE R
OER
A11L
A10L
I/O 8L (7C139)
I/O 7L
I/O 0L
BUSYL
A9L
A0L
COL
SEL
COLUMN
I/O
COLUMN
I/O
COL
SEL
ROW
SELECT
MEMORY
ARRAY
M/S
ARBITRATION
Figure 1. Logic Block Diagram
ROW
SELECT
A11R
A10R
I/O8R (7C139)
I/O7R
I/O0R
BUSY R
A9R
A0R
|
|
ABSOLUTE MAXIMUM RATINGS1
(Referenced to VSS)
SYMBOL
PARAMETER
LIMITS
VDD DC supply voltage
-0.5 to 7.0V
VI/O
TSTG
Voltage on any pin
Storage temperature
-0.5 to (VDD + 0.3)V
-65 to +150°C
www.DataSheet4U.com
PD
TJ
Maximum power dissipation
Maximum junction temperature2
2.0W
+150°C
ΘJC Thermal resistance, junction-to-case3
3.3°C/W
II DC input current
±10 mA
Notes:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2. Maximum junction temperature may be increased to +175°C during burn-in and steady-static life.
3. Test per MIL-STD-883, Method 1012, infinite heat sink.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VDD Positive supply voltage
TC Case temperature range
VIN DC input voltage
LIMITS
4.5 to 5.5V
-55 to +125°C
0V to VDD
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for UT7C139 electronic component. |
Information | Total 21 Pages | |
Link URL | [ Copy URL to Clipboard ] | |
Download | [ UT7C139.PDF Datasheet ] |
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