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PDF GS74116ATP Data sheet ( Hoja de datos )

Número de pieza GS74116ATP
Descripción 256K x 16 4Mb Asynchronous SRAM
Fabricantes GSI Technology 
Logotipo GSI Technology Logotipo



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No Preview Available ! GS74116ATP Hoja de datos, Descripción, Manual

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GS74116ATP/J/X
SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
256K x 16
4Mb Asynchronous SRAM
7, 8, 10, 12 ns
3.3 V VDD
Center VDD and VSS
Features
• Fast access time: 7, 8, 10, 12 ns
• CMOS low power operation: 150/130/105/95 mA at
minimum cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Byte control
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
J: 400 mil, 44-pin SOJ package
TP: 400 mil, 44-pin TSOP Type II package
X: 6 mm x 10 mm Fine Pitch Ball Grid Array
package
Description
The GS74116A is a high speed CMOS Static RAM organized
as 262,144 words by 16 bits. Static design eliminates the need
for external clocks or timing strobes. The GS operates on a
single 3.3 V power supply and all inputs and outputs are TTL-
compatible. The GS74116A is available in a 6 x 10 mm Fine
Pitch BGA package, 400 mil SOJ and 400 mil TSOP Type-II
packages.
SOJ 256K x 16-Pin Configuration (Package J)
A4 1
A3 2
A2 3
A1 4
A0 5
Top view
CE 6
DQ1 7
DQ2 8
DQ3 9
DQ4 10
VDD 11
44-pin
VSS 12
DQ5 13
SOJ
DQ6 14
DQ7 15
DQ8 16
WE 17
A15 18
A14 19
A13 20
A12 21
A16 22
44 A5
43 A6
42 A7
41 OE
40 UB
39 LB
38 DQ16
37 DQ15
36 DQ14
35 DQ13
34
33
32
VSS
VDD
DQ12
31 DQ11
30 DQ10
29 DQ9
28 NC
27 A8
26 A9
25 A10
24 A11
23 A17
Pin Descriptions
Symbol
A0–A17
DQ1–DQ16
CE
LB
UB
WE
OE
VDD
VSS
NC
Description
Address input
Data input/output
Chip enable input
Lower byte enable input
(DQ1 to DQ8)
Upper byte enable input
(DQ9 to DQ16)
Write enable input
Output enable input
+3.3 V power supply
Ground
No connect
FP-BGA 256K x 16 Bump Configuration (Package X)
123456
A LB OE A0 A1 A2 NC
B DQ16 UB A3 A4 CE DQ1
C DQ14 DQ15 A5 A6 DQ2 DQ3
D VSS DQ13 A17 A7 DQ4 VDD
E VDD DQ12 NC A16 DQ5 VSS
F DQ11 DQ10 A8 A9 DQ7 DQ6
G DQ9 NC A10 A11 WE DQ8
H NC A12 A13 A14 A15 NC
6 x 10 mm Bump Pitch
Rev: 1.03 10/2002
1/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.

1 page




GS74116ATP pdf
GS74116ATP/J/X
Power Supply Currents
Parameter Symbol
Test Conditions
Operating
Supply
Current
IDD
CE VIL
All other inputs
VIH or VIL
Min. cycle time
IOUT = 0 mA
Standby
Current
ISB1
CE VIH
All other inputs
VIH or VIL
Min. cycle time
Standby
Current
CE VDD – 0.2V
ISB2 All other inputs
VDD – 0.2 V or 0.2 V
0 to 70°C
–40 to 85°C
Unit
7 ns 8 ns 10 ns 12 ns 7 ns 8 ns 10 ns 12 ns
150 130 105 90 160 140 115 100 mA
40 30 25 25 50 40 35 35 mA
10 20 mA
AC Test Conditions
Parameter
Conditions
Input high level
Input low level
Input rise time
Input fall time
Input reference level
Output reference level
Output load
VIH = 2.4 V
VIL = 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
1.4 V
Fig. 1& 2
Note:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
Output Load 1
DQ
5030pF1
VT = 1.4 V
Output Load 2
3.3 V
DQ 589
5pF1 434
Rev: 1.03 10/2002
5/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.

5 Page





GS74116ATP arduino
44-Pin, 400 mil TSOP-II
44 D
23
1
e
y
22
B
GS74116ATP/J/X
Dimension in inch Dimension in mm
c Symbol min nom max min nom max
A — — 0.047 — — 1.20
A1 0.002 — — 0.05 — —
A A2 0.037 0.039 0.041 0.95 1.00 1.05
B 0.01 0.014 0.018 0.25 0.35 0.45
c — 0.006 — — 0.15 —
D 0.721 0.725 0.729 18.31 18.41 18.51
E 0.396 0.400 0.404 10.06 10.16 10.26
e — 0.031 — — 0.80 —
HE 0.455 0.463 0.471 11.56 11.76 11.96
L 0.016 0.020 0.024 0.40 0.50 0.60
L1 — 0.031 — — 0.80 —
y — — 0.004 — — 0.10
Q
Detail A
Q 0o 5o 0o 5o
Notes:
1. Dimension D& E do not include interlead flash.
2. Dimension B does not include dambar protrusion/intrusion.
3. Controlling dimension: mm
Rev: 1.03 10/2002
11/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.

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