GS74108ATJ Datasheet PDF - GSI Technology
Part Number | GS74108ATJ | |
Description | 512K x 8 4Mb Asynchronous SRAM | |
Manufacturers | GSI Technology | |
Logo | ||
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GS74108ATP/J/X
SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
512K x 8
4Mb Asynchronous SRAM
8, 10, 12 ns
3.3 V VDD
Center VDD and VSS
Features
• Fast access time: 8, 10, 12 ns
• CMOS low power operation: 120/95/85 mA at minimum
cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
J: 400 mil, 36-pin SOJ package
GJ: RoHS-compliant 400 mil, 36-pin SOJ package
TP: 400 mil, 44-pin TSOP-II package
GP: RoHS-compliant 400 mil, 44-pin TSOP-II package
X: 6 mm x 10 mm FPBGA package
GX: RoHS-compliant 6 mm x 10 mm FPBGA package
• RoHS-compliant packages available
Description
The GS74108A is a high speed CMOS Static RAM organized
as 524,288 words by 8 bits. Static design eliminates the need
for external clocks or timing strobes. The GS74108A operates
on a single 3.3 V power supply and all inputs and outputs are
TTL-compatible. The GS74108A is available in 400 mil SOJ,
400 mil TSOP-II, and 6 mm x 10 mm FPBGA packages.
Pin Descriptions
Symbol
A0–A18
DQ1–DQ8
CE
WE
OE
VDD
VSS
NC
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
Ground
No connect
SOJ 512K x 8-Pin Configuration
A4 1
A3 2
A2 3
A1 4
A0 5
CE 6
DQ1 7
DQ2 8
VDD 9
VSS 10
DQ3 11
DQ4 12
WE 13
A17 14
A16 15
A15 16
A14 17
A13 18
36-pin
400 mil SOJ
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A5
A6
A7
A8
OE
DQ8
DQ7
VSS
VDD
DQ6
DQ5
A9
A10
A11
A12
A18
NC
FP-BGA 512K x 8 Bump Configuration (Package X)
123456
A NC OE A2 A6 A7 NC
B DQ1 NC A1 A5 CE DQ8
C DQ2 NC A0 A4 NC DQ7
D VSS NC A18 A3 NC VDD
E VDD NC A17 A9 NC VSS
F DQ3 NC A13 A10 NC DQ6
G DQ4 NC A14 A11 WE DQ5
H NC A16 A15 A12 A8 NC
6 mm x 10 mm
*All GSI Technology packages are at least 5/6 RoHS compliant.
Packages listed with the additional “G” designator are 6/6 RoHS compliant.
Rev: 1.07 1/2006
1/13
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.
|
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AC Test Conditions
Parameter
Conditions
Input high level
Input low level
Input rise time
Input fall time
Input reference level
Output reference level
Output load
VIH = 2.4 V
VIL = 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
1.4 V
Fig. 1& 2
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
GS74108ATP/J/X
Output Load 1
DQ
50Ω 30pF1
VT = 1.4 V
Output Load 2
3.3 V
DQ 589Ω
5pF1 434Ω
AC Characteristics
Read Cycle
Parameter
Symbol
Read cycle time
Address access time
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
* These parameters are sampled and are not 100% tested.
tRC
tAA
tAC
tOE
tOH
tLZ*
tOLZ*
tHZ*
tOHZ*
-8
Min Max
8—
—8
—8
— 3.5
3—
3—
0—
—4
— 3.5
-10
Min Max
10 —
— 10
— 10
—4
3—
3—
0—
—5
—4
-12
Min Max
12 —
— 12
— 12
—5
3—
3—
0—
—6
—5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev: 1.07 1/2006
5/13
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.
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