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PDF GS1574 Data sheet ( Hoja de datos )
| Número de pieza | GS1574 | |
| Descripción | HD-LINX -TM II Adaptive Cable Equalizer | |
| Fabricantes | Gennum Corporation | |
| Logotipo |  |
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Features
• SMPTE 292M, SMPTE 344M and SMPTE 259M
compliant
• Automatic cable equalization
• Multi-standard operation from 143Mb/s to 1.485Gb/s
• Supports DVB-ASI at 270Mb/s
• Small footprint (4mm x 4mm)
• Pb-free and Green
• Pin compatible with the GS9074 Cable Equalizer
• Manual bypass (useful for low data rates with slow
rise/fall times)
• Performance optimized for 270Mb/s and 1.485Gb/s
• Typical maximum equalized length of Belden 1694A
cable: 140m at 1.485Gb/s, 350m at 270Mb/s
• 50Ω differential output (with internal 50Ω pull-ups)
• Manual output mute or programmable mute based on
max cable length adjust
• Single 3.3V power supply operation
• Operating temperature range: 0°C to +70°C
Applications
• SMPTE 292M, SMPTE 344M and SMPTE 259M Coaxial
Cable Serial Digital Interfaces.
GS1574 HD-LINX ™ II
Adaptive Cable Equalizer
GS1574 Preliminary Data Sheet
Description
The GS1574 is a second-generation high-speed bipolar
integrated circuit designed to equalize and restore
signals received over 75Ω co-axial cable.
The GS1574 is designed to support SMPTE 292M,
SMPTE 344M and SMPTE 259M, and is optimized for
performance at 270Mb/s and 1.485Gb/s.
The GS1574 features DC restoration to compensate for
the DC content of SMPTE pathological test patterns.
A voltage programmable mute threshold (MCLADJ) is
included to allow muting of the GS1574 output when an
approximate selected cable length is reached for
SMPTE 259M signals. This feature allows the GS1574
to distinguish between low amplitude SD-SDI signals
and noise at the input of the device. The serial digital
outputs of the GS1574 may be forced to a mute state by
applying a voltage to the MUTE pin.
Power consumption is typically 270mW using a 3.3V
power supply. The GS1574 is lead-free, and the
encapsulation compound does not contain halogenated
flame retardant.
MCLADJ
SDI
SDI
CABLE LENGTH ADJUSTOR
CARRIER DETECT
MUTE
EQUALIZER
DC RESTORE
OUTPUT
MUTE
BYPASS
SDO
SDO
AGC
GS1574 Functional Block Diagram
Proprietary and Confidential 28854 - 2 December 2004
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www.gennum.com
1 page  
2. Electrical Characteristics
2.1 Absolute Maximum Ratings
GS1574 Preliminary Data Sheet
Parameter
Supply Voltage
Input ESD Voltage (Human Body Model)
Storage Temperature Range
Input Voltage Range (any input)
Operating Temperature Range
Power Dissipation
Lead Temperature (soldering, 10 sec)
Value
-0.5V to +3.6 VDC
500V
-50°C < Ts < 125°C
-0.3 to (VCC +0.3)V
0°C to 70°C
300mW
260°C
2.2 DC Electrical Characteristics
Table 2-1: DC Electrical Characteristics
VDD = 3.3V, TA = 0°C to 70°C, unless otherwise shown
Parameter
Symbol Conditions
Supply Voltage
Power Consumption
Supply Current
Output Common Mode
Voltage
Input Common Mode
Voltage
Floating MCLADJ DC
Voltage
MCLADJ Range
Mute Input Voltage
Required to Force Outputs
to Mute
Mute Input Voltage
Required to Force Outputs
Active
VCC
PD
Is
VCMOUT
VCMIN
–
–
VMute
VMute
–
TA = 25°C
TA = 25°C
TA = 25°C
TA = 25°C
0m, TA = 25°C
TA = 25°C
Min to Mute
Max to
Activate
Min
3.135
–
–
–
–
–
–
3.0
–
Typ
3.3
265
80
VCC - ∆VSDO/2
1.75
1.3
0.69
–
–
Max
3.465
–
–
–
–
–
–
–
2.0
Units
V
mW
mA
V
Test
Levels
–
2
1
7
Notes
±5%
–
–
–
V8 –
V7 –
V7 –
V7 –
V7 –
Proprietary and Confidential 28854 - 2 December 2004
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5 Page 
4. Detailed Description
GS1574 Preliminary Data Sheet
The GS1574 is a high speed bipolar IC designed to equalize serial digital signals.
The GS1574 can equalize both HD and SD serial digital signals, and will typically
equalize greater than 140m of Belden 1694A cable at 1.485Gb/s and 350m at
270Mb/s.
The GS1574 is powered from a single +3.3V power supply and consumes
approximately 270mW of power.
4.1 Serial Digital Inputs
The serial data signal may be connected to the input pins (SDI/SDI) in either a
differential or single ended configuration. AC coupling of the inputs is
recommended, as the SDI and SDI inputs are internally biased at approximately
1.8V.
4.2 Cable Equalization
The input signal passes through a variable gain equalizing stage whose frequency
response closely matches the inverse of the cable loss characteristic. In addition,
the variation of the frequency response with control voltage imitates the variation
of the inverse cable loss characteristic with cable length.
The edge energy of the equalized signal is monitored by a detector circuit which
produces an error signal corresponding to the difference between the desired edge
energy and the actual edge energy. This error signal is integrated by both an
internal and an external AGC filter capacitor providing a steady control voltage for
the gain stage. As the frequency response of the gain stage is automatically varied
by the application of negative feedback, the edge energy of the equalized signal is
kept at a constant level which is representative of the original edge energy at the
transmitter. The equalized signal is also DC restored, effectively restoring the logic
threshold of the equalized signal to its correct level independent of shifts due to AC
coupling. The digital output signals have a nominal voltage of 750mVpp differential,
or 375mVpp single ended when terminated with 50Ω as shown in Figure 4-1.
Proprietary and Confidential 28854 - 2 December 2004
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| PDF Descargar | [ Datasheet GS1574.PDF ] | |
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