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PDF U3525 Data sheet ( Hoja de datos )

Número de pieza U3525
Descripción REGULATING PWM IC
Fabricantes Unisonic Technologies 
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No Preview Available ! U3525 Hoja de datos, Descripción, Manual

UNISONIC TECHNOLOGIES CO., LTD
U3525
LINEAR INTEGRATED CIRCUIT
REGULATING PWM IC
DESCRIPTION
The UTC U3525 is a pulse width modulator IC and designed for
switching power supplies application to improve performance and
reduce external parts usage.
A shutdown terminal controls both the soft-start circuitry and the
output stages, providing instantaneous turn off through the PWM
latch with pulsed shutdown, as well as soft-start recycle with longer
shutdown commands. The output stage features NOR logic, giving
a LOW output for an OFF state. An under-voltage lockout circuitry,
which keeps the outputs off and the soft-start capacitor discharged
for sub-normal input voltages, includes approximately 500 mV of
hysteresis for jitter free operation. The PWM circuits also feature a
latch following the comparator. When a PWM pulses has been
terminated, the outputs will remain off for the duration of the period.
The latch is reset with each clock pulse. The output stages are
totem-pole designs capable of sourcing or sinking in excess of
200mA.
FEATURES
* Input Voltage: 8~35V
* On-chip +5.1V reference is trimmed to ±1%
* 100HZ ~ 500KHZ oscillator range
* Separate oscillator sync terminal
* Adjustable dead time control
* Internal soft-start
* Pulse-by-pulse shutdown
* Input under-voltage lockout with hysteresis
* Latching PWM to prevent multiple pulses
* Dual source/sink output drivers
www.DataSheet4U.com
ORDERING INFORMATION
Order Number
Normal
Lead Free Plating
U3525-D16-T
U3525L-D16-T
U3525-S16-R
U3525L-S16-R
U3525-S16-T
U3525L-S16-T
Package
DIP-16
SOP-16
SOP-16
SOP-16
DIP- 16
*Pb-free plating product number: U3525L
Packing
Tube
Tape Reel
Tube
U3525L-D16-T
(1)Packing Type
(2)Package Type
(3)Lead Plating
(1) R: Tape Reel, T: Tube
(2) D16: DIP-16, S16: SOP-16
(3) L: Lead Free Plating, Blank: Pb/Sn
www.unisonic.com.tw
Copyright © 2005 Unisonic Technologies Co., Ltd
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QW-R103-032,A

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U3525 pdf
U3525
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
ERROR AMPLIFIER SECTION (VCM = 5.1 V)
Output Low Level
0.2 0.5 V
Output High Level
3.8 5.6
V
Input Offset Voltage
Input Bias Current
VOS
Ib
2 10 mV
1 10 µA
Input Offset Current
Comm. Mode Reject.
Ios
CMR
VCM = 1.5 ~ 5.2 V
1 µA
60 75
dB
Supply Voltage Rejection
DC Open Loop Gain
DC Transconduct. (Note 1, 3)
Gain Bandwidth Product (Note 1)
PSR
VIN = 8 ~ 35 V
RL 10 M
30 KΩ ≤RL1 M, TJ = 25
Gv = 0 dB, TJ = 25
50 60
60 75
1.1 1.5
12
dB
dB
ms
MHz
PWM COMPARATOR
Input Threshold (Note 2)
Zero Duty-cycle
Maximum Duty-cycle
0.7 0.9
3.3 3.6
V
V
Input Bias Current (Note 1)
0.05 1 µA
Minimum Duty-cycle
0%
Maximum Duty-cycle (Note 2)
45 49
%
SHUTDOWN SECTION
Soft Start Low Level
Shutdown Threshold
VSD = 2.5 V
To outputs, VSS = 5.1 V, TJ = 25
0.4 0.7
0.6 0.8 1
V
V
Shutdown Input Current
VSD = 2.5 V
0.4 1 mA
Soft Start Current
Shutdown Delay (Note 1)
VSD = 0 V, VSS = 0 V
VSD = 2.5 V, TJ = 25
25 50 80 µA
0.2 0.5 µs
OUTPUT DRIVERS (each output) (VC = 20 V)
Output Low Level
Output High Level
Under-Voltage Lockout
ISINK = 20 mA
ISINK = 100 mA
ISOURCE = 20 mA
ISOURCE = 100 mA
VCOMP and VSS = High
0.2 0.4
12
18 19
17 18
6 78
V
V
V
V
V
Collector Leakage
Rise Time (Note 1)
IC VC = 35 V
tR CL = 1 nF, TJ = 25 °C
200 µA
100 600 ns
Fall Time (Note 1)
TOTAL STANDBY CURRENT
tF CL = 1 nF, TJ = 25 °C
50 300 ns
Supply Current
IS VIN = 35 V
Note:1.The parameters are not 100% tested in production.
14 20 mA
2.Tested at fosc=40 KHz (RT=3.6 K, CT=10nF, RD=0 ). Approximate oscillator frequency is defined by :
1
f = CT(0.7RT + 3RD)
3.DC transconductance (gM) relates to DC open-loop voltage gain (GV) according to the following equation:
GV=gM RL where RL is the resistance from pin 9 to ground. The minimum gM specification is used to calculate
minimum GV when the error amplifier output is loaded.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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