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PDF UR5515 Data sheet ( Hoja de datos )
| Número de pieza | UR5515 | |
| Descripción | 1.5A/3A BUS TERMINATION REGULATOR | |
| Fabricantes | Unisonic Technologies | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de UR5515 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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www.DataSheet4U.com
UNISONIC TECHNOLOGIES CO., LTD
UR5515
CMOS IC
1.5A/3A BUS TERMINATION
REGULATOR
SOP-8
DESCRIPTION
The UTC UR5515 is a linear bus termination regulator and
designed to convert voltage supplies ranging from 1.6V~6.0V into a
desired output voltage, which adjusted by two external voltage
divider resistors. The device can both source and sink up to 1.5A/3A
of current while regulating an output voltage to within 2% (DDR-I)
and 3% (DDR-II) or less.
The UTC UR5515 is capable of use in conjunction with series
termination resistors to provide an excellent voltage source for active
termination schemes of high speed transmission lines as those seen
in high speed memory buses and distributed backplane designs.
The voltage output of the regulator can be used as a termination
voltage for DDR SDRAM.
1 TO-252-5
1 TO-263-5
*Pb-free plating product number: UR5515L
FEATURES
* Support Both DDR-I (1.25 VTT) and DDR-II (0.9 VTT) Requirements
* Capable of Sourcing and Sinking Current 1.5A/3A
* Current-limiting Protection and Thermal Shutdown Protection
* Integrated Power MOSFETs
* Generates Termination Voltages for SSTL-2
* High Accuracy Output Voltage at Full-Load
* Adjustable output voltage by External Resistors
* Minimum External Components
* Shutdown for Standby or Suspend Mode Operation with
High-impedance Output.
ORDERING INFORMATION
Order Number
Normal
Lead Free Plating
UR5515-S08-R UR5515L-S08-R
UR5515-S08-T UR5515L-S08-T
UR5515-TN5-R UR5515L-TN5-R
UR5515-TN5-T UR5515L-TN5-T
UR5515-TQ5-R UR5515L-TQ5-R
UR5515-TQ5-T UR5515L-TQ5-T
Package
SOP-8
SOP-8
TO-252-5
TO-252-5
TO-263-5
TO-263-5
Packing
Tape Reel
Tube
Tape Reel
Tube
Tape Reel
Tube
www.unisonic.com.tw
Copyright © 2005 Unisonic Technologies Co., LTD
1 of 8
QW-R502-056,A
1 page  
UR5515
TYPICAL APPLICATION CIRCUIT
CMOS IC
R1= R2= 100KΩ
COUT(min)=10µF(Ceramic) + 1000µF under the worst case testing condition
CSS=1µF, CIN = 40µF(low ESR), CCNTL= 47µF
APPLICATIONS INFORMATION
Please note the point of thermal shutdown will be degraded by around 20 while VCNTL equal to 5V compared
with 3.3V. It is highly recommended that to use the 3.3V rail acted as the VCNTL in SOP-8 package. Nevertheless,
this small footprint of PCB for plastic SOP-8 package is not enough to dissipate effectively the heat generated
when operating at high current levels. In order to control die operating temperatures, the PCB layout should allow
for maximum possible copper area at the four VCNTL pins. Besides, an appropriate power plane heat sink must be
used to prevent overstepping maximum junction temperature. The recommended SMT is as below.
Use vias to conduct the heat into the
buried or backside of PCB layer.
The PCB heat sink copper area should be
solder painted without masked. This
approaches a "best case " pad heat sink .
UTC UR5515 (SOP-8)
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5 of 8
QW-R502-056,A
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet UR5515.PDF ] | |
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