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PDF STLVDS47 Data sheet ( Hoja de datos )
| Número de pieza | STLVDS47 | |
| Descripción | 3V LVDS QUAD CMOS DIFFERENTIAL LINE DRIVER | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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STLVDS47
3V LVDS QUAD CMOS DIFFERENTIAL LINE DRIVER
s >400 MBPS (200MHZ) SWITCHING RATES
s FLOW-THROUGH PINOUT SIMPLIFIES PCB
LAYOUT
s 300ps (MAX.) DIFFERENTIAL SKEW
s 1.8 ns (TYP.) PROPAGATION DELAY
s 3.3V POWER SUPPLY DESIGN
s ±350 mV DIFFERENTIAL SIGNALING
s LOW POWER DISSIPATION (3.5mW AT 3.3V
STATIC IN TRISTATE)
s INTEROPERABLE WITH EXISTING 5V LVDS
RECEIVERS
s HIGH IMPEDANCE ON LVDS OUTPUT ON
POWER DOWN
s CONFORMS TO TIA/EIA-644 LVDS
STANDARD
s INDUSTRIAL OPERATING TEMPERATURE
RANGE (-40 °C TO +85 °C)
s AVAILABLE IN SURFACE MOUNT (SOIC)
AND LOW PROFILE TSSOP PACKAGE
DESCRIPTION
The STLVDS47 is a quad CMOS flow-through
differential line driver designed for applications
requiring ultra low power dissipation and high data
rate. The device is designed to support data rates
in excess of 400Mbps (200 MHz) utilizing Low
Voltage Differential Signaling (LVDS) techology.
The STLVDS47 accepts low voltage TTL/CMOS
input levels and translates them to low voltage
SO-16
TSSOP
(350 mV) differential output signals. In addition,
the driver support a TRI-STATE function that may
be used to disable the output stage, disabling the
load current, and thus dropping the device to an
ultra low idle power state of 1.3mW typical. The
STLVDS47 has a flow-through pinout for easy
PCB layout.
The EN and EN* inputs are ANDed together and
control the TRI-STATE output.
The STLVDS47 and companion line receiver
(STLVDS48) provide a new alternative to high
power pseudo-ECL devices for high-speed
point-to-point interface applications.
ORDERING CODES
Type
STLVDS47BD
STLVDS47BDR
STLVDS47BTR
Temperature
Range
-40 to 85 °C
-40 to 85 °C
-40 to 85 °C
Package
SO-16 (Tube)
SO-16 (Tape & Reel)
TSSOP-16 (Tape & Reel)
Comments
50 parts per tube / 20 tube per box
2500 parts per reel
2500 parts per reel
December 2002
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1 page  
STLVDS47
SWITCHING CHARACTERISTICS (Typical values are at TA = 25°C, VCC = 3.3V ± 10%,
TA = -40 to 85 °C, unless otherwise specified). (Note 1, 2)
Symbol
Parameter
Test Conditions
Min.
Value
Typ.
Max.
Unit
tPLH
tPHL
tr
tf
tSK(p)
tSK(o)
tSK(pp)
tPZH
tPZL
tPHZ
tPLZ
fMAX
Propagation Delay Time Low-to-
High-Level output
Propagation Delay Time High-to-
Low-Level output
Differential Output signal rise time
Differential Output signal fall time
Pulse Skew (|tPHL- tPLH|)
Channel-to-Channel Output Skew
(Note 1)
Part-to-Part Skew (Note 2)
Propagation Delay Time, high-
impedance-to-high-level output
Propagation Delay Time, high-
impedance-to-low-level output
Propagation Delay Time, high-
level-to-high-impedance output
Propagation Delay Time, low-
level-to-high-impedance output
Maximum Operating Frequency
RL = 100 Ω, CL = 5 pF
1.6 1.8 2.7 ns
1.6 1.8 2.7 ns
0.5 1
0.5 1
100 300
100 300
ns
ns
ps
ps
1 ns
5.4 10 ns
7.4 12 ns
3.5 6 ns
3.9 6 ns
250 MHz
NOTE 1: CL includes probe and jig capacitance.
NOTE 2: tSK(o) is the magnitude of the time difference between the tPLH or tPHL of all drivers of a single device with all of their inputs connected
together.
NOTE 3: tSK(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both de-
vices operate with same supply voltage, at the same temperature, and have identical packages and test circuits.
5/10
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| PDF Descargar | [ Datasheet STLVDS47.PDF ] | |
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