74AUP1G86 Datasheet PDF - NXP Semiconductors
Part Number | 74AUP1G86 | |
Description | Low Power 2-Input EXCLUSIVE-OR Gate | |
Manufacturers | NXP Semiconductors | |
Logo | ||
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74AUP1G86
Low-power 2-input EXCLUSIVE-OR gate
Rev. 01 — 9 August 2004
Product data sheet
1. General description
The 74AUP1G86 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP1G86 provides the single 2-input EXCLUSIVE-OR function.
2. Features
s Wide supply voltage range from 0.8 V to 3.6 V
s High noise immunity
s Complies with JEDEC standards:
x JESD8-12 (0.8 V to 1.3 V)
x JESD8-11 (0.9 V to 1.65 V)
x JESD8-7 (1.2 V to 1.95 V)
x JESD8-5 (1.8 V to 2.7 V)
x JESD8-B (2.7 V to 3.6 V)
s ESD protection:
x HBM JESD22-A114-C exceeds 2000 V
x MM JESD22-A115-A exceeds 200 V
x CDM JESD22-C101-C exceeds 1000 V
s Low static power consumption; ICC = 0.9 µA (maximum)
s Latch-up performance exceeds 100 mA per JESD 78 Class II
s Inputs accept voltages up to 3.6 V
s Low noise overshoot and undershoot < 10 % of VCC
s IOFF circuitry provides partial Power-down mode operation
s Multiple package options
s Specified from −40 °C to +85 °C and −40 °C to +125 °C
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Philips Semiconductors
74AUP1G86
Low-power 2-input EXCLUSIVE-OR gate
10. Recommended operating conditions
Table 7:
Symbol
VCC
VI
VO
Tamb
tr, tf
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
output voltage
active mode
ambient temperature
Power-down mode; VCC = 0 V
input rise and fall times VCC = 0.8 V to 3.6 V
Min Max Unit
0.8 3.6 V
0 3.6 V
0 VCC V
0 3.6 V
−40 +125 °C
0 200 ns/V
11. Static characteristics
Table 8: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ
Tamb = 25 °C
VIH HIGH-state input voltage
VCC = 0.8 V
VCC = 0.9 V to 1.95 V
0.70 × VCC -
0.65 × VCC -
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.6 -
2.0 -
VIL LOW-state input voltage VCC = 0.8 V
--
VCC = 0.9 V to 1.95 V
--
VCC = 2.3 V to 2.7 V
--
VCC = 3.0 V to 3.6 V
--
VOH HIGH-state output voltage VI = VIH or VIL
IO = −20 µA; VCC = 0.8 V to 3.6 V
IO = −1.1 mA; VCC = 1.1 V
IO = −1.7 mA; VCC = 1.4 V
IO = −1.9 mA; VCC = 1.65 V
IO = −2.3 mA; VCC = 2.3 V
IO = −3.1 mA; VCC = 2.3 V
IO = −2.7 mA; VCC = 3.0 V
IO = −4.0 mA; VCC = 3.0 V
VCC − 0.1 -
0.75 × VCC -
1.11 -
1.32 -
2.05 -
1.9 -
2.72 -
2.6 -
VOL LOW-state output voltage VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
-
-
-
-
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
--
--
IO = 2.3 mA; VCC = 2.3 V
--
IO = 3.1 mA; VCC = 2.3 V
--
IO = 2.7 mA; VCC = 3.0 V
--
IO = 4.0 mA; VCC = 3.0 V
--
Max Unit
-V
-V
-V
-V
0.30 × VCC V
0.35 × VCC V
0.7 V
0.9 V
-V
-V
-V
-V
-V
-V
-V
-V
0.1
0.3 × VCC
0.31
0.31
0.31
0.44
0.31
0.44
V
V
V
V
V
V
V
V
9397 750 14684
Product data sheet
Rev. 01 — 9 August 2004
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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