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PDF 74VCX1632245 Data sheet ( Hoja de datos )

Número de pieza 74VCX1632245
Descripción 16-BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRANSLATOR
Fabricantes ST Microelectronics　
Logotipo ST Microelectronics Logotipo



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74VCX1632245
16-BIT DUAL SUPPLY BUS TRANSCEIVER
LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR
I HIGH SPEED: tPD = 4.4ns (MAX.) at TA=85°C
VCCA = 3.0V VCCB = 2.3V
I LOW POWER DISSIPATION:
ICCA = ICCB = 20µA(MAX.) at TA=85°C
I SYMMETRICAL OUTPUT IMPEDANCE:
|IOHA| = IOLA = 8mA MIN at
VCCA = 3.0V VCCB = 1.65V or 2.3V
|IOHA| = IOLA = 18mA MIN at
VCCA = 2.3V VCCB = 1.65V)
I BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
I POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
I 26Ω SERIES RESISTOR ON A SIDE OUTPUTS
I OPERATING VOLTAGE RANGE:
VCCA(OPR) = 2.3V to 3.6V (1.2V Data
Retention)
VCCB(OPR) = 1.65V to 2.7V (1.2V Data
Retention)
I MAX DATA RATES:
380 Mbps (1.8V to 3.3V translation)
260 Mbps (<1.8V to 3.3V translation)
260 Mbps (Translate to 2.5V)
210 Mbps (Translate to 1.5V)
100 Mbps (Translate to 1.2V)
I PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16245
I LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
I ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74VCX1632245 is a dual supply low voltage
CMOS 16-BIT BUS TRANSCEIVER fabricated
with sub-micron silicon gate and five-layer metal
wiring C2MOS technology. Designed for use as an
interface between a 3.3V bus and a 2.5V or 1.8V
bus in a mixed 3.3V/1.8V,3.3V/2.5V and 2.5V/
1.8V supply systems, it achieves high speed
operation while maintaining the CMOS low power
dissipation.
This IC is intended for two-way asynchronous
communication between data buses and the
direction of data transmission is determined by
nDIR inputs. The enable inputs nG can be used to
disable the device so that the buses are effectively
March 2005
TSSOP
TFBGA
µTFBGA
Table 1: Order Codes
PACKAGE
TSSOP48
TFBGA54
µTFBGA42
T&R
74VCX1632245TTR
74VCX1632245LBR
74VCX1632245TBR
isolated. The A-port interfaces with the 3V bus, the
B-port with the 2.5V and 1.8V bus.
All inputs are equipped with protection circuits
against static discharge, giving them 2KV ESD im-
munity and transient excess voltage. All floating
bus terminals during High Z State must be held
HIGH or LOW.
Figure 1: Logic Diagram
n = 1, 2
Rev. 14
1/18

1 page




74VCX1632245 pdf
74VCX1632245
Table 6: DC Specification For VCCA
Test Condition
Symbol
Parameter
VCCB VCCA
(V) (V)
VIHA
VILA
VOHA
VOLA
IIA
IOZA
High Level Input
Voltage (An) (*)
Low Level Input
Voltage (An) (*)
High Level
Output Voltage
Low Level
Output Voltage
Input Leakage
Current
High Impedance
Output Leakage
Current
1.8
1.8
2.5
1.8
1.8
2.5
2.3
2.3
1.65
1.65
2.3
2.3
1.65
1.65
2.7
2.7
IOFF Power Off
0
Leakage Current
ICCtA
∆ICCtA
Quiescent
Supply Current
Maximum
Quiescent
Supply Current /
Input (An)
1.95
1.95
2.7
2.7
1.95
1.95
2.5
3.3
3.3
2.5
3.3
3.3
3.0 IO=-100µA
3.0 IO=-8mA
3.0 IO=-8mA
2.3 IO=-6mA
3.0 IO=100µA
3.0 IO=8mA
3.0 IO=8mA
2.3 IO=6mA
3.6 VI = VCC or GND
3.6 VIA = GND or 3.6V
VIB = VIHB or VILB
G = VCCB
0 VIA = GND to 3.6V
VIB = GND to 3.6V
G, Dir = GND to
3.6V
3.6
2.7
3.6
VIA =VCCA or GND
VIB =VCCB or GND
3.6
3.6 VIA =VCCA - 0.6V
2.7 VIB =VCCB or GND
Value
TA = 25 °C
Min.
1.6
2.0
2.0
2.8
2.4
2.4
1.8
Typ.
Max.
0.7
0.8
0.8
0.2
0.55
0.55
0.40
± 0.5
± 1.0
± 1.0
2
(*) VCC range = 3.3±0.3; 2.5±0.2V; 1.8±0.15V
-40 to 85 °C
Min.
1.6
2.0
2.0
2.8
2.4
2.4
1.8
Max.
0.7
0.8
0.8
0.2
0.55
0.55
0.40
±5
± 10
Unit
V
V
V
V
µA
µA
± 10 µA
20 µA
0.75 mA
5/18

5 Page





74VCX1632245 arduino
DIM.
A
A1
A2
b
c
D
E
E1
e
K
L
74VCX1632245
MIN.
0.05
0.17
0.09
12.4
6.0
0°
0.45
TSSOP48 MECHANICAL DATA
mm.
TYP
0.9
8.1 BSC
0.5 BSC
MAX.
1.2
0.15
0.27
0.20
12.6
6.2
8°
0.75
MIN.
inch
TYP.
0.002
0.0067
0.0035
0.488
0.236
0°
0.018
0.035
0.318 BSC
0.0197 BSC
MAX.
0.047
0.006
0.011
0.0079
0.496
0.244
8°
0.030
A A2
A1 b
e
D
K
c
L
E
E1
PIN 1 IDENTIFICATION
1
7065588D
11/18

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