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Número de pieza | NCP3488 | |
Descripción | MOSFET Driver | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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NCP3488
MOSFET Driver with Dual
Outputs for Synchronous
Buck Converters
The NCP3488 is a single Phase 12 V MOSFET gate driver
optimized to drive the gates of both high−side and low−side power
MOSFETs in a synchronous buck converter. The high−side and
low−side driver is capable of driving a 3000 pF load with a 25 ns
propagation delay and a 20 ns transition time.
With a wide operating voltage range, high or low side MOSFET
gate drive voltage can be optimized for the best efficiency. Internal
adaptive nonoverlap circuitry further reduces switching losses by
preventing simultaneous conduction of both MOSFETs.
The floating top driver design can accommodate VBST voltages as
high as 30 V, with transient voltages as high as 35 V. Both gate outputs
can be driven low by applying a low logic level to the Output Disable
(OD) pin. An Undervoltage Lockout function ensures that both driver
outputs are low when the supply voltage is low, and a Thermal
Shutdown function provides the IC with overtemperature protection.
Features
• Thermal Shutdown for System Protection
• Internal Pulldown Resistor Suppresses Transient Turn On of Either
MOSFET
• Anti Cross−Conduction Protection Circuitry
• Floating Top Driver Accommodates Boost Voltages of up to 30 V
• One Input Signal Controls Both the Upper and Lower Gate Outputs
• Output Disable Control Turns Off Both MOSFETs
• Complies with VRM10.x and VRM11.x Specifications
• Undervoltage Lockout
• Thermal Shutdown
• Thermally Enhanced Package Available
• This is a Pb−Free Device
http://onsemi.com
8
1
SO−8
D SUFFIX
CASE 751
MARKING
DIAGRAMS
8
N3488
ALYW
G
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
PIN CONNECTIONS
BST 1
IN
OD
VCC
8 DRVH
SWN
PGND
DRVL
ORDERING INFORMATION
Device
Package
Shipping†
NCP3488DR2G
SO−8 2500 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 1
1
Publication Order Number:
NCP3488/D
1 page OD
DRVH
or
DRVL
NCP3488
tpdlOD
90%
tpdhOD
10%
Figure 2. Output Disable Timing Diagram
IN
DRVL
DRVH−SW
SW
tpdlDRVL
tfDRVL
90%
2V
10%
tpdhDRVH
trDRVH
90%
10%
90%
tpdlDRVH
tfDRVH
90%
10%
trDRVL
2V 10%
tpdhDRVL
Figure 3. Nonoverlap Timing Diagram
APPLICATIONS INFORMATION
Theory of Operation
The NCP3488 is a single phase MOSFET driver designed
for driving two N−channel MOSFETs in a synchronous buck
converter topology. The NCP3488 will operate from 5 V or
12 V, but it has been optimized for high current multi−phase
buck regulators that convert 12 Volt rail directly to the core
voltage required by complex logic chips. A single PWM input
signal is all that is required to properly drive the high−side and
the low−side MOSFETs. Each driver is capable of driving a
3.3 nF load at frequencies up to 500 kHz.
Low−Side Driver
The low−side driver is designed to drive a
ground−referenced low RDS(on) N−Channel MOSFET. The
voltage rail for the low−side driver is internally connected to
the VCC supply and PGND.
High−Side Driver
The high−side driver is designed to drive a floating low
RDS(on) N−channel MOSFET. The gate voltage for the high
side driver is developed by a bootstrap circuit referenced to
Switch Node (SW) pin.
The bootstrap circuit is comprised of an external diode,
and an external bootstrap capacitor. When the NCP3488 is
starting up, the SW pin is at ground, so the bootstrap
capacitor will charge up to VCC through the bootstrap diode
See Figure 4. When the PWM input goes high, the high−side
driver will begin to turn on the high−side MOSFET using the
stored charge of the bootstrap capacitor. As the high−side
MOSFET turns on, the SW pin will rise. When the high−side
MOSFET is fully on, the switch node will be at 12 volts, and
the BST pin will be at 12 volts plus the charge of the
bootstrap capacitor (approaching 24 volts).
The bootstrap capacitor is recharged when the switch
node goes low during the next cycle.
http://onsemi.com
5
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet NCP3488.PDF ] |
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