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What is UHP112?

This electronic component, produced by the manufacturer "Oxford Semiconductor", performs the same function as "Two-Port PCI-to-USB OpenHCI Host Controller - Product Brief".


UHP112 Datasheet PDF - Oxford Semiconductor

Part Number UHP112
Description Two-Port PCI-to-USB OpenHCI Host Controller - Product Brief
Manufacturers Oxford Semiconductor 
Logo Oxford Semiconductor Logo 


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UHP112
Two-Port PCI-to-USB OpenHCI Host Controller - Product Brief
Features
Q 32-bit, 33 MHz PCI interface compliant with PCI
Local Bus Specification Revision 2.1s
Q Two downstream USB ports
Q Full compliance with Universal Serial Bus Specifi-
cation Revision 1.1
Q OpenHCI Open Host Controller Interface Specifi-
cation for USB Release 1.0a compatible
Q Provides advanced power management capabili-
ties compliant with PCI Bus Power Management
Interface Specification Revision 1.1
Q Fully compatible with Microsoft Windows* Standard
OpenHCD Drivers
Q Supports legacy keyboard and mouse devices
Q Integrated dual-speed USB transceivers
Q 3 V or 5 V switchable PCI signaling
Q 100-pin TQFP
Q Evaluation kit available
Applications
Q Seamless integration with 3 V or 5 V PCI-based
computer products
Q Supports all USB compliant devices and hubs
Description
The Transdimension’s UHP112 provides a single-
chip PCI-to-Universal Serial Bus (USB) solution. The
UHP112 interfaces directly to any 32-bit 33 MHz PCI
bus and is ideal for either onboard applications or
add-in card applications. It can easily be configured
to communicate in either a 3 V PCI environment or
5 V PCI environment simply by selecting the appro-
priate communications voltage level on the VIO input
pin.
* Microsoft and Windows are registered trademarks of Microsoft
Corporation.
The UHP112 is a 3.3 V device fabricated in 0.35 µm
technology. Integrated dual-speed USB transceivers
enable a single-chip PCI-to-USB solution.
The UHP112 supports the legacy peripherals feature,
as defined in the OpenHCI Specification Release
1.0a.
An advanced power management capabilities inter-
face compliant with PCI Bus Power Management
Interface Specification Revision 1.1 is present to offer
a variety of power-savings modes to the host system.
The UHP112 provides two downstream USB ports for
connectivity with any USB compliant device or hub.
Full-speed or low-speed peripherals are supported
along with all of the USB transfer types: control, inter-
rupt, bulk, or isochronous. The UHP112’s OpenHCI
compliance offers significant USB performance
benefits and reduced CPU overhead compared to
other host controllers.
The UHP112 is fully compatible with the Microsoft
Windows Standard OpenHCD Drivers.
The UHP112 is supported natively as an OHCI
compliant host controller under Windows 98, ME, XP
and CE, as well as under MacOS and Linux. For
customers using other operating systems, Soft-
Connex Technologies’ USBLink Host solution
supports a wide range of products, such as AMX,
ITRON, Linux, LynxOS, MS-DOS, Nucleus, OS-40,
PowerTV, QNX, ThreadX, VRTX and VxWorks.
USBLink Host is also distinguished by the variety of
USB devices that it can support, including: printers;
audio, communication, human interface and mass
storage devices; digital still and video cameras;
Hubs; MP3 players; Host to Host cables and Blue-
tooth connectivity products. In addition, USBLink
Host runs on both little endian (x86, ARM, SA, SH,
ST) and big endian (PPC, MIPS) processors. For
more information, please visit www.softconnex.com.
*SoftConnex Technologies is a wholly owned subsidiary of Trans-
dimension Inc.

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UHP112 equivalent
UHP112
Two-Port PCI-to-USB OpenHCI Host Controller
Pin Information (continued)
Table 2. Pin Descriptions
Pin Symbol*
Type
Description
1 A20MN Output/Open Drain Legacy Gate A20 Output (Active-Low).
2 AD2
Bidir
PCI Address/Data Bit.
3 AD1
Bidir
PCI Address/Data Bit.
4 AD0
Bidir
PCI Address/Data Bit.
5 VSS
Power
Device Ground.
6 CLK48
Input
USB Clock (48 MHz).
7 VDD
Power
Device Power (3.3 V).
8 PMEN Output/Open Drain Power Management Event (Active-Low).
9 PRTPWR1
Bidir
Port 1 Power. Logic output expected to turn on port 1 power. Boot-
strap low for high active. Bootstrap high for low active.
10 PWRFLT1N
Input
Port 1 Power Fault (Active-Low). Logic input indicates an overcur-
rent fault on port 1.
11 PWROK1
Input
Port 1 Power OK. Analog or digital input to inform the UHP112 that
USB port 1 power is stable (when >4 V).
12 VDDT
Power
Transceiver Power (3.3 V).
13 DPLS1
Bidir
DIfferential USB Port 1 Signals.
14 DMNS1
Bidir
15 PMIENABLE
Input
Power Management Interface Enable Input (Active-High).
16 VSST
Power
Transceiver Ground.
17 VDDT
Power
Transceiver Power (3.3 V).
18 DPLS2
Bidir
Differential USB Port 2 Signals.
19 DMNS2
Bidir
20 VSS
Power
Device Ground.
21 TEST0
Input
Test 0. For device testing. Connect this to ground during normal use.
Connect to logic high for NAND tree mode. See NAND Tree Mode
on page 2-32.
22 PWROK2
Input
Port 2 Power OK. Analog or digital input to inform the UHP112 that
USB port 2 power is stable (when >4 V).
23 PWRFLT2N
Input
Port 2 Power Fault (Active-Low). Logic input indicates an overcur-
rent fault on port 2.
24 PRTPWR2
Bidir
Port 2 Power. Logic output expected to turn on port 2 power. Boot-
strap low for high active. Bootstrap high for low active.
25 TEST1
Input
Test 1. For device testing. Tie this to ground during normal use.
Connect to logic high for NAND tree mode. See the NAND Tree
Mode section on page 2-32.
26 VDD5
Power
5 V Power for 5 V PCI Operation. 5 V must be present on this pin
while selecting either 3 V PCI or 5 V PCI operation with the VIO pin.
See PCI Connection Instructions section on page 2-26.
27
IRQ1
Output/Open Drain System Keyboard Interrupt (Active-High).
28 IRQ12 Output/Open Drain System Mouse Interrupt (Active-High).
29
SMIN
Output/Open Drain System Management Interrupt (Active-Low).
30 INTAN Output/Open Drain PCI Interrupt (Active-Low).
31 RSTN
Input
PCI Reset (Active-Low). Also the chip reset.
32 CLK
Input
PCI Clock. 33 MHz input clock.
* Active-low signals within this document are indicated by an N following the symbol names.
Transdimension Inc.
5


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