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PDF STA2059 Data sheet ( Hoja de datos )
| Número de pieza | STA2059 | |
| Descripción | IN VEHICLE NAVIGATION/TELEMATICS SYSTEM ON CHIP | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de STA2059 (archivo pdf) en la parte inferior de esta página. Total 4 Páginas | ||
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STA2059
IN VEHICLE NAVIGATION/TELEMATICS
SYSTEM ON CHIP
DATA BRIEF
1 FEATURES
Figure 1. Package
■ ARM720 MCU
– 32-bit RISC MCU with 3-stage pipeline.
– Max. CPU frequency ~ 68 MHz.
– Fully instructions compatible with the ARM7
family of processors.
PQFP208 (28x28x3.4mm)
– 8 KByte Instruction + Data cache, 4-way set-
associative.
– Write buffer de-coupling CPU from system
memory during write operations.
Table 1. Order Codes
Part Number
STA2059
Package
PQFP208
– MMU for virtual to physical address mapping
and memory protection.
en from internal selectable clock (oscillator or
■ Memories
– 16 KBytes Program RAM Memory
CPU clock), output compare and input cap-
ture functions.
– 4 KBytes on-chip boot ROM
– 16-bit Watchdog Timer with 8-bit prescaler
– External SDRAM Interface for up to 128 ■ Digital Audio
–
Mbytes SDRAM.
External Memory
Interface
(EMI)
for
– 24-bit Audio Digital to Analog
uDpattaoS8heet4U.co(mADAC) with digital volume control
converter
DataShee
Mbytes SRAM, Flash, ROM.
– Enhanced Serial Audio Interface (ESAI) sup-
– ATAPI interface supporting PIO4 mode
porting I2S format
■ Nested interrupt controller
– Fast interrupt handling with multiple vectors
– 32 vectors with 16 IRQ priority levels
– 2 maskable FIQ sources
■ Clock, Reset and Supply Management
– 3.3 V ±5% operating supply range for Input/
Output, AD, ADAC.
– 1.8 V ±5% operating supply range for core
supply, PLL, RTC and 32 kHz osc.
– Internal system clocks generated by fully in-
ternal PLL
– Power management providing different oper-
ating modes: RUN, SLEEP, STOP, STAND-
BY.
■ 35 I/O ports
– 35 multifunctional bidirectional I/O lines
– 5 ports with interrupt capability
■ 3 Timers
– Two 16-bit programmable Timer modules
with prescaler (fAPB divided by 1 to 256) driv-
DataSheet4U.com
September 2004
■ 6 Communications Interfaces
– USB slave interface 1.1 compliant
– C-CAN module compliant with the CAN spec-
ification V2.0 part B (active).
– Two High-Speed Universal Asynchronous
Receiver Transmitter (UART) for full-duplex
asynchronous communication.
– Two Buffered Serial Peripheral Interfaces
(BSPI) for full-duplex, synchronous, commu-
nications with external devices, master or
slave operation.
■ A/D Converter
– 11-bit resolution Analog/Digital Converter
supporting 4 multiplexed inputs at up to 950
Hz sampling rate.
■ Development Tools Support
– 5-pin JTAG port (IEEE 1149.1 Standard)
■ Package
– 208-pin PQFP208 package.
– -40°C to 85°C operating temperature range.
Rev. 1
1/4
This is preliminary information on a new product now in development. Details are subject to change without notice.
1 page | ||
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