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PDF UPD780228 Data sheet ( Hoja de datos )
| Número de pieza | UPD780228 | |
| Descripción | (UPD780226 / UPD780228) 8 Bit Single-Chip Microcontrollers | |
| Fabricantes | NEC | |
| Logotipo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD780226, 780228
8-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
The µPD780226 and µPD780228 are members of the µPD780228 Subseries of the 78K/0 Series.
The FIP™ (VFD) controller/driver and N-ch open-drain port of the conventional µPD78044H Subseries have been
enhanced for the µPD780228 Subseries.
A flash memory version, the µPD78F0228, that can operate within the same power supply voltage range as the
mask ROM version, and various development tools are under development.
The details of functions are described in the following user’s manuals. Be sure to read them before
designing.
µPD780228 Subseries User’s Manual : U12012E
78K/0 Series User’s Manual Instructions : IEU-1372
FEATURES
• I/O ports: 72 (sixteen N-ch open-drain I/O ports)
• Internal high-capacity ROM and RAM
Item
Part Number
µPD780226
µPD780228
Program memory
(ROM)
48 Kbytes
60 Kbytes
Internal high-speed RAM
1024 bytes
Data memory
Internal expanded RAM
512 bytes
FIP display RAM
96 bytes
• Minimum instruction execution time can be changed
from high-speed (0.4 µs) to low-speed (6.4 µs)
• FIP controller/driver: 48 display outputs
(Universal grid supported)
• 8-bit resolution A/D converter: eight channels
• Serial interface: one channel
• Timer: Four channels
• Power supply voltage: VDD = 4.5 to 5.5 V
APPLICATIONS
Compact-type integrated system components, separate-type system components, tuners, cassette tape decks,
compact disc players, audio amplifiers, etc.
ORDERING INFORMATION
Part Number
µPD780226GF-×××-3BA
µPD780228GF-×××-3BA
Package
100-pin plastic QFP (14 × 20 mm)
100-pin plastic QFP (14 × 20 mm)
Remark ××× indicates the ROM code suffix.
The information in this document is subject to change without notice.
Document No. U11797EJ1V0DS00 (1st edition)
Date Published July 1997 N
Printed in Japan
The mark shows major revised points.
©
1996
1 page  
µPD780226, 780228
CONTENTS
1. PIN CONFIGURATION (TOP VIEW) ................................................................................................. 6
2. BLOCK DIAGRAM ............................................................................................................................. 8
3. PIN FUNCTION LIST .......................................................................................................................... 9
3.1 Port Pins ..................................................................................................................................................... 9
3.2 Non-port Pins .......................................................................................................................................... 11
3.3 Pin I/O Circuits and Recommended Connection of Unused Pins ................................................... 12
4. MEMORY SPACE ............................................................................................................................. 14
5. PERIPHERAL HARDWARE FUNCTION FEATURES ................................................................... 15
5.1 Port ............................................................................................................................................................ 15
5.2 Clock Generator ...................................................................................................................................... 16
5.3 Timer/Event Counter ............................................................................................................................... 16
5.4 A/D Converter .......................................................................................................................................... 18
5.5 Serial Interface ........................................................................................................................................ 19
5.6 FIP Controller/Driver ............................................................................................................................... 19
6. INTERRUPT FUNCTIONS ............................................................................................................... 21
7. STANDBY FUNCTION ..................................................................................................................... 24
8. RESET FUNCTION ........................................................................................................................... 24
9. INSTRUCTION SET .......................................................................................................................... 25
10. ELECTRICAL SPECIFICATIONS ................................................................................................... 27
11. PACKAGE DRAWING ...................................................................................................................... 42
12. RECOMMENDED SOLDERING CONDITIONS .............................................................................. 43
APPENDIX A. DEVELOPMENT TOOLS .............................................................................................. 44
APPENDIX B. RELATED DOCUMENTS .............................................................................................. 46
5
5 Page 
µPD780226, 780228
3.2 Non-port Pins
Pin Name
I/O
INTP0
Input
INTP1
SCK
SO
SI
TI1
TIO50
TIO51
FIP0 to FIP15
FIP16 to FIP23
FIP24 to FIP31
FIP32 to FIP39
FIP40 to FIP47
VLOAD
RESET
X1
X2
ANI0 to ANI7
AVDD
AVSS
VDD0
VDD1
VDD2
VSS0
VSS1
IC
I/O
Output
Input
Input
I/O
I/O
Output
—
Input
Input
—
Input
—
—
—
—
—
—
—
—
Function
Effective edge (rising edge, falling edge, or both rising and
falling edges) can be specified.
External interrupt request input.
Serial interface serial clock I/O.
Serial interface serial data output.
Serial interface serial data input.
8-bit remote control timer (TM1) timer input.
8-bit PWM timer (TM50) capture trigger input/timer output.
8-bit PWM timer (TM51) capture trigger input/timer output.
FIP controller/driver high-voltage withstand large current output.
After Reset
Input
Input
Input
Input
Input
Input
Input
Output
Input
FIP controller/driver pull-down resistor connection.
—
System reset input.
—
Crystal connection for main system clock oscillation.
—
—
A/D converter analog input.
Input
A/D converter analog power supply (the same potential with VDD1).
—
A/D converter ground potential (the same potential with VSS1).
—
Positive power supply for ports.
—
Positive power supply except for ports, analog, and FIP controller/driver.
—
Positive power supply for FIP controller/driver.
—
Ground potential for ports.
—
Ground potential except for ports and analog.
—
Internal connection. Connect directly to VSS1 pin.
—
Alternate
Function
P00
P01
P20
P21
P22
P23
P24
P25
—
P70 to P77
P80 to P87
P90 to P97
P100 to P107
—
—
—
—
P10 to P17
—
—
—
—
—
—
—
—
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UPD780228.PDF ] | |
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