PDF GDPXA210 Data sheet ( Hoja de datos )

Número de pieza	GDPXA210
Descripción	(GDPXA210 / GDPXA250) Applications Processors
Fabricantes	Intel
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No Preview Available ! www.DataSheet4U.com Intel® PXA250 and PXA210 Applications Processors Electrical, Mechanical, and Thermal Specification Datasheet Product Features ■ High Performance Processor — Intel® XScale™ Microarchitecture — 32 KB Instruction Cache — 32 KB Data Cache — 2 KB “mini” Data Cache — Extensive Data Buffering ■ Intel® Media Processing Technology — Enhanced 16-bit Multiply — 40-bit Accumulator ■ Flexible Clocking — CPU clock from 66 to 300 MHz — Flexible memory clock ratios — Frequency change modes ■ Rich Serial Peripheral Set — AC97 Audio Port — I2S Audio Port — USB Client Controller — High Speed UART — Second UART with flow control — FIR and SIR infrared comm ports ■ Low Power —Less than 500 mW Typical Internal Dissipation —Supply Voltage may be Reduced to 0.85 V —Low Power/Sleep Modes ■ High Performance Memory Controller —Four Banks of SDRAM - up to 100 MHz —Five Static Chip Selects —Support for PCMCIA or Compact Flash —Companion Chip interface ■ Additional Peripherals for system connectivity —Multimedia Card Controller (MMC) —SSP Controller —I2C Controller —Two Pulse Width Modulators (PWMs) —All peripheral pins double as GPIOs. ■ Hardware debug features ■ Hardware Performance Monitoring features www.DataSheFeebtru4arUy, 2.0c02om Order Number: 278524-001 1 page www.DataSheet4U.com Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Revision History Date 7/6/01 2/8/02 Revision 0.5 -001 Description First Release First public release of the EMTS www.DDaattaasheSetheet4U.com 5 5 Page www.DataSheet4U.com Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 2. Pin and Signal Descriptions for the PXA250 Applications Processor (Sheet 3 of 7) Name Type Description nIOIS16/ GPIO[57] I/O Select 16. This signal is an input and is an acknowledge from the PCMCIA ICOCZ card that the current address is a valid 16 bit wide I/O address. See Note [1] nPWAIT/ GPIO[56] PCMCIA Wait. This signal is an input and is driven low by the PCMCIA card to ICOCZ extend the length of the transfers to/from applications processor. See Note [1] nPSKTSEL/ GPIO[54] nPREG/ GPIO[55] ICOCZ PCMCIA Socket Select. This signal is an output and is used by external steering logic to route control, address and data signals to one of the two PCMCIA sockets. When PSKTSEL is low, socket zero is selected. When PSKTSEL is high, socket one is selected. This signal has the same timing as an address. See Note [1] ICOCZ PCMCIA Register Select. This signal is an output and indicates that, on a memory transaction, the target address is attribute space. This signal has the same timing as address. See Note [1] LCD Controller Pins L_DD(15:0)/ GPIO[73:58] LCD Controller display data ICOCZ See Note [1] L_FCLK/ GPIO[74] LCD Frame clock ICOCZ See Note [1] L_LCLK/ GPIO[75] L_PCLK/ GPIO[76] LCD Line clock ICOCZ See Note [1] LCD pixel clock ICOCZ See Note [1] L_BIAS/ GPIO[77] AC Bias Drive ICOCZ See Note [1] Full Function UART Pins FFRXD/ GPIO[34] Full Function UART Receive pin ICOCZ See Note [1] FFTXD/ GPIO[39] Full Function UART Transmit pin ICOCZ See Note [1] FFCTS/ GPIO[35] Full Function UART Clear-to-Send pin ICOCZ See Note [1] FFDCD/ Full Function UART Data-Carrier-Detect Pin GPIO[36] mFFDSR/ oGPIO[37] .cFFRI/ UGPIO[38] t4FFDTR/ GPIO[40] eeFFRTS/ h GPIO[41] ICOCZ See Note [1] Full Function UART Data-Set-Ready Pin: ICOCZ See Note [1] Full Function UART Ring Indicator Pin ICOCZ See Note [1] Full Function UART Data-Terminal-Ready pin ICOCZ See Note [1] Full Function UART Ready-to-Send pin ICOCZ See Note [1] www.DataSDatasheet 11 11 Page

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