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PDF UPD441000L-X Data sheet ( Hoja de datos )
| Número de pieza | UPD441000L-X | |
| Descripción | 1M-BIT CMOS STATIC RAM 128K-WORD BY 8-BIT EXTENDED TEMPERATURE OPERATION | |
| Fabricantes | NEC | |
| Logotipo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD441000L-X
1M-BIT CMOS STATIC RAM
128K-WORD BY 8-BIT
EXTENDED TEMPERATURE OPERATION
Description
The µPD441000L-X is a high speed, low power, 1,048,576 bits (131,072 words by 8 bits) CMOS static RAM.
The µPD441000L-X has two chip enable pins (/CE1, CE2) to extend the capacity.
5 The µPD441000L-X is packed in 32-pin plastic SOP and 32-pin plastic TSOP (I) (8×13.4 mm) and (8×20 mm).
Features
• 131,072 words by 8 bits organization
• Fast access time : 70, 85, 100, 120, 150 ns (MAX.)
• Low voltage operation
(B version : VCC = 2.7 to 3.6 V, C version : VCC = 2.2 to 3.6 V, D version : VCC = 1.8 to 3.6 V)
• Low VCC data retention
(B version : 2.0 V (MIN.), C version, D version : 1.5 V (MIN.))
• Operating ambient temperature : TA = –25 to +85 °C
• Output Enable input for easy application
• Two Chip Enable inputs : /CE1, CE2
Part number
µPD441000L-BxxX
µPD441000L-CxxX
µPD441000L-DxxX
Access time Operating supply Operating ambient
ns (MAX.)
voltage
temperature
V °C
70, 85, 100
2.7 to 3.6
−25 to +85
100, 120
2.2 to 3.6
120, 150
1.8 to 3.6
At operating
mA (MAX.)
25
Supply current
At standby At data retention
µA (MAX.)
µA (MAX.)
2 2 Note
Note 0.5 µA (TA ≤ 40 °C)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M13714EJ5V0DSJ1 (5th edition)
Date Published December 2000 NS CP (K)
Printed in Japan
The mark • shows major revised points.
©
1998
1 page  
µPD441000L-X
32-pin Plastic TSOP (I) (8×13.4) (Reverse bent)
[ µPD441000LGU-BxxX-9KH ]
[ µPD441000LGU-CxxX-9KH ]
[ µPD441000LGU-DxxX-9KH ]
32-pin Plastic TSOP (I) (8×20) (Reverse bent)
[ µPD441000LGZ-BxxX-KKH ]
[ µPD441000LGZ-CxxX-KKH ]
[ µPD441000LGZ-DxxX-KKH ]
/OE 32
A10 31
/CE1
30
I/O8 29
I/O7 28
I/O6 27
I/O5 26
5
I/O4
GND
25
24
I/O3 23
I/O2 22
I/O1 21
A0 20
A1 19
A2 18
A3 17
1 A11
2 A9
3 A8
4 A13
5 /WE
6 CE2
7 A15
8 VCC
9 NC
10 A16
11 A14
12 A12
13 A7
14 A6
15 A5
16 A4
A0 - A16
I/O1 - I/O8
/CE1, CE2
/WE
/OE
VCC
GND
NC
: Address inputs
: Data inputs / outputs
: Chip Enable 1, 2
: Write Enable
: Output Enable
: Power supply
: Ground
: No connection
Remark Refer to Package Drawings for the 1-pin index mark.
Data Sheet M13714EJ5V0DS
5
5 Page 
µPD441000L-X
Read Cycle (3/3) (D version)
Parameter
Symbol
Read cycle time
Address access time
/CE1 access time
CE2 access time
/OE to output valid
Output hold from address change
/CE1 to output in low impedance
CE2 to output in low impedance
/OE to output in low impedance
/CE1 to output in high impedance
CE2 to output in high impedance
/OE to output in high impedance
tRC
tAA
tCO1
tCO2
tOE
tOH
tLZ1
tLZ2
tOLZ
tHZ1
tHZ2
tOHZ
µPD441000L-D12X
MIN.
MAX.
120
120
120
120
60
10
10
10
5
40
40
40
µPD441000L-D15X
MIN.
MAX.
150
150
150
150
70
10
10
10
5
50
50
50
Notes 1. The output load is 1TTL + 30 pF.
2. The output load is 1TTL + 5 pF.
Remark These AC characteristics are in common regardless of package types.
Unit Condition
ns
ns Note 1
ns
ns
ns
ns
ns Note 2
ns
ns
ns
ns
ns
Read Cycle Timing Chart
Address (Input)
/CE1 (Input)
CE2 (Input)
/OE (Input)
I/O (Output)
tRC
tAA
tCO1
tLZ1
tCO2
tLZ2
High impedance
tOE
tOLZ
Remark In read cycle, /WE should be fixed to high level.
tOH
tHZ1
tHZ2
tOHZ
Data out
Data Sheet M13714EJ5V0DS
11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet UPD441000L-X.PDF ] | |
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