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PDF UPD16876 Data sheet ( Hoja de datos )
| Número de pieza | UPD16876 | |
| Descripción | Single Pch High-Side Switch for USB | |
| Fabricantes | NEC Electronics | |
| Logotipo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD16876
SINGLE Pch HIGH-SIDE SWITCH FOR USB
DESCRIPTION
The µPD16876 is a power switch IC with an overcurrent limiter that is used for the power bus of a Universal Serial
Bus (USB). This product has one Pch power MOSFET circuits, which has a low-on resistance (100 mΩ TYP.), in its
switching block. This product boasts an operating current consumption of as low as 100 µA (MAX.).
In addition, the IC is also equipped with an overcurrent detector that is essential for a host/hub controller
conforming to the USB Standard, so that the IC can report an overcurrent to the controller. Moreover, a thermal
shutdown circuit and an undervoltage lockout circuit are also provided as the protection circuits of the IC.
This product has one channel of power switch, control input pin, and flag output pin to simultaneously control one
USB port with a single IC.
FEATURES
• One P-ch power MOSFET circuit
• Overcurrent detector that outputs active-low control signal from detection report pin
• Overcurrent limiter to prevent system voltage drop
• Thermal shutdown circuit
• Undervoltage lockout circuit
• This control circuit can be turned on and off independently of the others by a control pin.
• 8-pin SOP package
ORDERING INFORMATION
Part Number
µPD16876G
Package
8-pin SOP (5.72 mm (225))
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. S14288EJ1V0DS00 (1st edition)
Date Published April 2001 N CP(K)
Printed in Japan
©
2001
1 page  
µPD16876
ELECTRICAL SPECIFICATIONS
DC Characteristics (Unless otherwise specified, VIN = +5 V, TA = +25°C)
Parameter
Symbol
Conditions
MIN.
Current consumption
Input voltage, low
Input voltage, high
LATCH input voltage, low
LATCH input voltage, high
Control input current
Output MOSFET on-resistance
Output leakage current
Overcurrent detector threshold
Flag output resistance
Flag leakage current
Undervoltage lockout circuit
operating voltage
IDD
VIL
VIH
VIL
VIH
ICTL
RON
IO LEAK
ITH
RON F
IO LEAK F
VUVLO
VCTL = VIN, OUT: Open
VCTL = 0 V, OUT: open
CTL pin
CTL pin
LATCH pin
LATCH pin
VCTL = 0 V
VCTL = VIN
TA = 0 to +70°C,
IOUT = 500 mA
VIN = 3 to 5 V, TA = 0 to 70°C
IOUT = 500 mA
TA = 0 to +70°C
VIN = 3 to 5 V, TA = 0 to 70°C
IL = 10 mA
VFLAG = 5 V
VIN: When rising
VIN: When falling
Hysteresis width
2.0
3.5
0.6
0.5
2.2
2.0
0.05
TYP.
1
MAX.
5
80
1.0
1.5
0.01
0.01
100
1
1
140
200
0.9
10
0.01
2.5
2.3
10
1.25
1.25
25
1
2.8
2.6
0.25
Unit
µA
µA
V
V
V
V
µA
µA
mΩ
mΩ
µA
A
A
Ω
µA
V
V
V
AC Characteristics (Unless otherwise specified, VIN = +5 V, TA = +25°C)
Parameter
Symbol
Conditions
MIN.
Output transition rise time (ON)
Output transition fall time (OFF)
tRISE
tFALL
RL = 10 Ω per output
RL = 10 Ω per output
2.5
Overcurrent detection delay time
Overcurrent detection output rise
time
tOVER
tSRISE
RL = 10 Ω per output
2.5
Minimum CTL high time
CTL → FLG Delay time
tCTL
tC-F Delay
CTL : L→H→L
Over Current Detect CTL1 → FLG4
20
TYP.
5
20
5
MAX.
8
10
8
10
Unit
ms
µs
µs
ms
µs
µs
Data Sheet S14288EJ1V0DS
5
5 Page 
µPD16876
On Detection of Overcurrent
IN (input)
5V
FLG
(output)
CTL
(input)
OUT
(output)
LATCH = "L"
Iout
5V
GND
5V
GND
GND
5V
GND
Overcurrent detection
threshold
OUT
(output)
LATCH = "H"
Iout
Inrush current Slow
Output is
start short-circuited
5 V period
GND
Overcurrent detection
threshold
Inrush current Slow
Output is
start short-circuited
period
If an overcurrent is detected after the overcurrent detection delay time of 20 µs, the IC executes a slow-start
operation (output rise time: 5 ms TYP.) again.
If an overcurrent is detected while the IC is executing the slow-start operation again, it is assumed that the output
is short-circuited and the FLG pin goes low. When the CTL signal is deasserted inactive, OUT is turned OFF and
FLG goes high. If the CTL signal is asserted active, OUT is turned back ON unless the undervoltage lockout circuit
or thermal shutdown circuit is activated.
When LATCH = “H”, output is turned off at the timing of FLG = “L”.
Data Sheet S14288EJ1V0DS
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet UPD16876.PDF ] | |
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