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PDF GM71C4400C Data sheet ( Hoja de datos )

Número de pieza GM71C4400C
Descripción 1M x 4 Bit CMOS DRAM
Fabricantes Hynix Semiconductor 
Logotipo Hynix Semiconductor Logotipo



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No Preview Available ! GM71C4400C Hoja de datos, Descripción, Manual

LG Semicon Co.,Ltd.
GM71C(S)4400C/CL
1,048,576 WORDS x 4BIT
CMOS DYNAMIC RAM
Description
Features
The GM71C(S)4400C/CL is the new generation
dynamic RAM organized 1,048,576 words x 4 bit.
GM71C(S)4400C/CL has realized higher density,
higher performance and various functions by
utilizing advanced CMOS process technology. The
GM71C(S)4400C/CL offers Fast Page Mode as a
high speed access Mode. Multiplexed address
inputs permit the GM71C(S)4400C/CL to be
packaged in a standard 300mil 20(26) pin plastic
SOJ and standard 300mil 20(26) pin plastic
TSOP II. The package size provides high system
bit densities and is compatible with widely
available automated testing and insertion
equipment. System oriented features include single
power supply of 5V+/-10% tolerance, direct
interfacing capability with high performance logic
families such as Schottky TTL.
Pin Configuration
20 (26) SOJ
* 1,048,576 Words x 4 Bit Organization
* Fast Page Mode Capability
* Single Power Supply (5V+/-10%)
* Fast Access Time & Cycle Time
(Unit: ns)
tRAC tCAC tRC
tPC
GM71C(S)4400C/CL-60 60 15 110 40
GM71C(S)4400C/CL-70 70 20 130 45
GM71C(S)4400C/CL-80 80 20 150 50
* Low Power
Active : 605/550/495mW (MAX)
Standby : 5.5mW (CMOS level : MAX)
1.1mW (L-version)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
* All inputs and outputs TTL Compatible
* 1024 Refresh Cycles/16ms
* 1024 Refresh Cycles/128ms (L-version)
* Battery Back Up Operation (L-version)
20 (26) TSOP II
I/O1
I/O2
WE
RAS
A9
A0 6
A1 7
A2 8
A3 9
VCC 10
VSS
I/O4
I/O3
CAS
OE
15 A8
14 A7
13 A6
12 A5
11 A4
(Top View)
I/O1 1
I/O2 2
WE 3
RAS 4
A9 5
20 VSS
19 I/O4
18 I/O3
17 CAS
16 OE
VSS 20
I/O4 19
I/O3 18
CAS 17
OE 16
1 I/O1
2 I/O2
3 WE
4 RAS
5 A9
A0 6
A1 7
A2 8
A3 9
VCC 10
15 A8
14 A7
13 A6
12 A5
11 A4
A8 15
A7 14
A6 13
A5 12
A4 11
6 A0
7 A1
8 A2
9 A3
10 VCC
NORMAL TYPE
REVERSE TYPE
(Top View)
1

1 page




GM71C4400C pdf
LG Semicon
Read Cycle
Symbol
Parameter
tRAC Access Time from RAS
tCAC Access Time from CAS
tAA Access Time from Address
tOAC Access Time from OE
tRCS Read Command Setup Time
tRCH Read Command Hold Time to CAS
tRRH Read Command Hold Time to RAS
tRAL Column Address to RAS Lead Time
tOFF1 Output Buffer Turn-off Time
tOFF2 Output Buffer Turn-off Time from OE
tCDD CAS to DIN Delay Time
tOEP OE Pulse width
GM71C(S)4400C/CL
GM71C(S)4400 GM71C(S)4400 GM71C(S)4400
C/CL-60
C/CL-70
C/CL-80
Unit
Min Max Min Max Min Max
Note
- 60 - 70 - 80 ns 2,3,17
- 15 - 20 - 20 ns 3, 4,
13, 17
- 30 - 35 - 40 ns 3, 5,
13, 17
- 15 - 20 - 20 ns 3,17
0 - 0 - 0 - ns
0 - 0 - 0 - ns 18
0 - 0 - 0 - ns 18
30 - 35 - 40 - ns
0 15 0 15 0 15 ns
6
0 15 0 15 0 15 ns
6
15 - 20 - 20 - ns
15 - 20 - 20 - ns
Write Cycle
Symbol
Parameter
tWCS Write Command Setup Time
tWCH Write Command Hold Time
tWP Write Command Pulse Width
tRWL Write Command to RAS Lead Time
tCWL Write Command to CAS Lead Time
tDS Data-in Setup Time
tDH Data-in Hold Time
GM71C(S)4400 GM71C(S)4400 GM71C(S)4400
C/CL-60
C/CL-70
C/CL-80
Unit
Min Max Min Max Min Max
Note
0 - 0 - 0 - ns 10
15 - 15 - 15 - ns
10 - 10 - 10 - ns
15 - 20 - 20 - ns
15 - 20 - 20 - ns
0 - 0 - 0 - ns 11
15 - 15 - 15 - ns 11
5

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