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PDF 74LVT162245 Data sheet ( Hoja de datos )
| Número de pieza | 74LVT162245 | |
| Descripción | Low Voltage 16-Bit Transceiver | |
| Fabricantes | Fairchild Semiconductor | |
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January 1999
Revised June 2005
74LVT162245 • 74LVTH162245
Low Voltage 16-Bit Transceiver with 3-STATE Outputs
and 25: Series Resistors in A Port Outputs
General Description
The LVT162245 and LVTH162245 contains sixteen non-
inverting bidirectional buffers with 3-STATE outputs and is
intended for bus oriented applications. The device is byte
controlled. Each byte has separate control inputs which
can be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
The LVT162245 and LVTH162245 are designed with
equivalent 25: series resistance in both the HIGH and
LOW states on the A Port outputs. This design reduces line
noise in applications such as memory address drivers,
clock drivers, and bus transceivers/transmitters.
The LVTH162245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These non-inverting transceivers are designed for low volt-
age (3.3V) VCC applications, but with the capability to pro-
vide a TTL interface to a 5V environment. The LVT162245
and LVTH162245 are fabricated with an advanced
BiCMOS technology to achieve high speed operation simi-
lar to 5V ABT while maintaining a low power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH162245),
also available without bushold feature (74LVT162245).
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s A Port outputs include equivalent series resistance of
25: making external termination resistors unnecessary
and reducing overshoot and undershoot
s A Port outputs source/sink r12 mA.
B Port outputs source/sink 32 mA/64 mA
s Functionally compatible with the 74 series 162245
s Latch-up performance exceeds 500 mA
s ESD performance:
Human-body model ! 2000V
Machine model ! 200V
Charged-device model ! 1000V
s Also packaged in plastic Fine Pitch Ball Grid Array
(FBGA)
Ordering Code:
Order Number Package Number
Package Description
74LVT162245G
(Note 1)(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary)
74LVT162245MEA
(Note 2)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVT162245MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH162245G
(Note 1)(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVTH162245MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TUBE]
74LVTH162245MEX
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TAPE and REEL]
74LVTH162245MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBE]
74LVTH162245MTX
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2005 Fairchild Semiconductor Corporation DS012446
www.fairchildsemi.com
1 page  
DC Electrical Characteristics (Continued)
Symbol
Parameter
VCC
TA 40qC to 85qC
Units
(V) Min Max
Conditions
IPU/PD
IOZL
IOZL
(Note 5)
Power Up/Down
3-STATE Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
0–1.5V
3.6
3.6
r100
5
5
PA VO 0.5V to 3.0V
VI GND to VCC
PA VO 0.5V
PA VO 0.0V
IOZH
IOZH
(Note 5)
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3.6
3.6
5 PA VO 3.0V
5 PA VO 3.6V
IOZH
ICCH
ICCL
ICCZ
ICCZ
3-STATE Output Leakage Current
Power Supply Current
Power Supply Current
Power Supply Current
Power Supply Current
3.6
3.6
3.6
3.6
3.6
10
0.19
5
0.19
0.19
PA VCC VO d 5.5V
mA Outputs HIGH
mA Outputs LOW
mA Outputs Disabled
mA VCC d VO d 5.5V,
Outputs Disabled
'ICC
Increase in Power Supply Current
(Note 8)
Note 5: Applies to Bushold versions only (74LVTH162245).
3.6
0.2 mA One Input at VCC 0.6V
Other Inputs at VCC or GND
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND.
Dynamic Switching Characteristics (Note 9)
Symbol
Parameter
VCC TA 25qC
Units
(V) Min Typ Max
VOLP
VOLV
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
3.3
3.3
0.8
0.8
V
V
Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n1 data inputs are driven 0V to 3V. Output under test held LOW.
Conditions
CL 50 pF, RL 500:
(Note 10)
(Note 10)
5 www.fairchildsemi.com
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 74LVT162245.PDF ] | |
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