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PDF UPA2710GR Data sheet ( Hoja de datos )
| Número de pieza | UPA2710GR | |
| Descripción | SWITCHING N- AND P-CHANNEL POWER MOS FET | |
| Fabricantes | NEC | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µPA2710GR
SWITCHING
P-CHANNEL POWER MOS FET
DESCRIPTION
The µPA2710GR is P-Channel MOS Field Effect Transistor
designed for power management applications of notebook
computers and Li-ion battery protection circuit.
FEATURES
• Low on-state resistance
RDS(on)1 = 5.5 mΩ MAX. (VGS = –10 V, ID = –7.5 A)
RDS(on)2 = 9.0 mΩ MAX. (VGS = –4.5 V, ID = –7.5 A)
RDS(on)3 = 11 mΩ MAX. (VGS = –4.0 V, ID = –7.5 A)
5 • Low Ciss: Ciss = 4300 pF TYP.
• Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
µPA2710GR
PACKAGE
Power SOP8
PACKAGE DRAWING (Unit: mm)
85
1, 2, 3 : Source
4 : Gate
5, 6, 7, 8 : Drain
14
5.37 MAX.
6.0 ±0.3
4.4
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.8
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
–30
V
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
Total Power Dissipation Note3
VGSS
ID(DC)
ID(pulse)
PT1
PT2
m20
m15
m100
2
2
V
A
A
W
W
Channel Temperature
Tch 150 °C
Storage Temperature
Single Avalanche Current Note4
Single Avalanche Energy Note4
Tstg –55 to + 150 °C
IAS −15
A
EAS 22.5 mJ
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on ceramic substrate of 1200 mm2 x 2.2 mm
3. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec
4. Starting Tch = 25°C, VDD = –15 V, RG = 25 Ω, L = 100 µH, VGS = –20 → 0 V
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Source
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible,
and quickly dissipate it once, when it has occurred.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G15978EJ3V0DS00 (3rd edition)
Date Published February 2003 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
2002
1 page  
µPA2710GR
5 DRAIN TO SOURCE ON-STATERESISTANCE vs.
CHANNEL TEMPERATURE
15
VGS = −4.0 V
10 −4.5 V
−10 V
5
0
- 50
P uls ed
ID = −7.5 A
0 50 100
Tch - Channel Temperature - °C
150
5 SWITCHING CHARACTERISTICS
1000
td(off)
tf
100
tr
10 td(on)
VDD = −15 V
VGS = −10 V
RG = 10 Ω
1
- 0.1
-1
- 10
- 100
ID - Drain Current - A
5 SOURCE TO DRAIN DIODE FORWARD VOLTAGE
1000
P uls ed
100 VGS = −10 V
0V
10
1
0.1
0.01
0
0.2 0.4 0.6 0.8
1
VF(S-D) - Source to Drain Voltage - V
1.2
5 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10000
C is s
1000
C os s
C rs s
100
VGS = 0 V
f = 1 MHz
10
0.01
0.1 1 10
VDS - Drain to Source Voltage - V
100
5 DYNAMIC INPUT/OUTPUT CHARACTERISTICS
- 30 - 15
VDD = −24 V
−15 V
- 20 −6 V
- 10
- 10
VGS
-5
VDS
0
ID = −15 A
0
0 20 40 60 80 100
QG - Gate Charge - nC
5
10000
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
1000
100
10
0.1
VGS = 0 V
di/dt = 50 A/µs
1 10
IF - Diode Forward Current - A
100
Data Sheet G15978EJ3V0DS
5
5 Page | ||
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| PDF Descargar | [ Datasheet UPA2710GR.PDF ] | |
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