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PDF UPA2711GR Data sheet ( Hoja de datos )
| Número de pieza | UPA2711GR | |
| Descripción | SWITCHING N- AND P-CHANNEL POWER MOS FET | |
| Fabricantes | NEC | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA2711GR
SWITCHING
P-CHANNEL POWER MOS FET
DESCRIPTION
The µ PA2711GR is P-Channel MOS Field Effect Transistor
designed for power management applications of notebook
computers and Li-ion battery protection circuit.
FEATURES
• Low on-state resistance
RDS(on)1 = 9 mΩ MAX. (VGS = −10 V, ID = −6.5 A)
RDS(on)2 = 15 mΩ MAX. (VGS = −4.5 V, ID = −6.5 A)
RDS(on)3 = 20 mΩ MAX. (VGS = −4.0 V, ID = −6.5 A)
• Low Ciss: Ciss = 2450 pF TYP.
• Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
µ PA2711GR
PACKAGE
Power SOP8
PACKAGE DRAWING (Unit: mm)
85
1, 2, 3 : Source
4 : Gate
5, 6, 7, 8 : Drain
14
5.37 MAX.
6.0 ±0.3
4.4
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.8
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, Unless otherwise noted, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
–30
V
Gate to Source Voltage (VDS = 0 V)
VGSS
m20
V
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
Total Power Dissipation Note3
ID(DC)
ID(pulse)
PT1
PT2
m13
m52
2
2
A
A
W
W
Channel Temperature
Tch 150 °C
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Storage Temperature
Single Avalanche Current Note4
Single Avalanche Energy Note4
Tstg –55 to + 150 °C
IAS −13 A
EAS
16.9
mJ
Source
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on ceramic substrate of 1200 mm2 x 2.2 mm
3. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec
4. Starting Tch = 25°C, VDD = –15 V, RG = 25 Ω, L = 100 µH, VGS = –20 → 0 V
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as
possible, and quickly dissipate it once, when it has occurred.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G15979EJ1V0DS00 (1st edition)
Date Published March 2004 NS CP(K)
Printed in Japan
2004
1 page  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
30
25
20 VGS = −4.0 V
15
−4.5 V
−10 V
10
5
0
-50
Pulsed
ID = −6.5 A
0 50 100 150
Tch - Channel Temperature - °C
1000
SWITCHING CHARACTERISTICS
td(off)
100 tf
10
1
-0.1
1000
tr
td(on)
VDD = −15 V
VGS = −10 V
RG = 10 Ω
-1 -10
ID - Drain Current - A
-100
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
100 VGS = −10 V
10
0V
1
0.1
0.01
0
Pulsed
0.2 0.4 0.6 0.8 1
VF(S-D) - Source to Drain Voltage - V
1.2
µ PA2711GR
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10000
Ciss
1000
Coss
100
Crss
VGS = 0 V
f = 1 MHz
10
-0.01
-0.1
-1
-10
VDS - Drain to Source Voltage - V
-100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
-30 -15
ID = −13 A
-20
VDD = −24 V
−15 V
−6 V
-10
-10
0
0
1000
VDS
VGS
10 20 30 40 50
QG - Gate Charge - nC
-5
0
60
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
100
10
di/dt = 50 A/µs
VGS = 0 V
1
0.1 1
10
IF - Diode Forward Current - A
100
Data Sheet G15979EJ1V0DS
5
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| PDF Descargar | [ Datasheet UPA2711GR.PDF ] | |
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