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PDF UPA2714GR Data sheet ( Hoja de datos )
| Número de pieza | UPA2714GR | |
| Descripción | SWITCHING N- AND P-CHANNEL POWER MOS FET | |
| Fabricantes | NEC | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µPA2714GR
SWITCHING
P-CHANNEL POWER MOS FET
DESCRIPTION
The µPA2714GR is P-Channel MOS Field Effect Transistor
designed for power management applications of notebook
computers and Li-ion battery protection circuit.
FEATURES
• Low on-state resistance
RDS(on)1 = 20 mΩ MAX. (VGS = −10 V, ID = −3.5 A)
RDS(on)2 = 30 mΩ MAX. (VGS = −4.5 V, ID = −3.5 A)
RDS(on)3 = 34 mΩ MAX. (VGS = −4.0 V, ID = −3.5 A)
• Low Ciss: Ciss = 1370 pF TYP.
• Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
µPA2714GR
PACKAGE
Power SOP8
PACKAGE DRAWING (Unit: mm)
85
1, 2, 3 ; Source
4 ; Gate
5, 6, 7, 8 ; Drain
14
5.37 MAX.
6.0 ±0.3
4.4
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.8
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
−30
V
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
Total Power Dissipation Note3
VGSS
ID(DC)
ID(pulse)
PT1
PT2
m20
m7
m28
2
2
V
A
A
W
W
Channel Temperature
Tch 150 °C
Storage Temperature
Single Avalanche Current Note4
Single Avalanche Energy Note4
Tstg −55 to +150 °C
IAS −7
A
EAS 4.9 mJ
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on a ceramic substrate of 1200 mm2 x 2.2 mm
3. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm) , PW = 10 sec
4. Starting Tch = 25°C, VDD = −15 V, RG = 25 Ω, L = 100 µH, VGS = −20 → 0 V
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Source
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible,
and quickly dissipate it once, when it has occurred.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with NEC Electronics sales
representative for availability and additional information.
Document No. G15982EJ2V0DS00 (2nd edition)
Date Published November 2002 NS CP(K)
Printed in Japan
The mark ! shows major revised points.
2002
1 page  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
40
35
VGS = −4.0 V
30
25
−4.5 V
20
−10 V
15
10
5 ID = −3.5 A
Pulsed
0
-50 0 50 100 150
Tch - Channel Temperature - °C
µPA2714GR
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10000
1000
100
Ciss
Coss
Crss
VGS = 0 V
f = 1 MHz
10
- 0.01
- 0.1
-1
- 10
VDS - Drain to Source Voltage - V
- 100
SWITCHING CHARACTERISTICS
1000
100
10
1
- 0.1
td(off)
tf
tr
td(on)
VDD = −15 V
VGS = −10 V
RG = 10 Ω
- 1 - 10
ID - Drain Current - A
- 100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
- 30 - 12
VDD = −24 V
−15 V
- 20 −6 V
VGS
- 10
- 10
-8
-6
-4
-2
VDS
00
0 5 10 15 20 25 30 35
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
1000
100
VGS = −10 V
10
0V
1
0.1
0.01
0
Pulsed
0.2 0.4 0.6 0.8 1 1.2 1.4
VF(S-D) - Source to Drain Voltage - V
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
1000
100
10
di/dt = 100 A/µs
VGS = 0 V
1
0.1 1
10 100
IF - Diode Forward Current - A
Data Sheet G15982EJ2V0DS
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet UPA2714GR.PDF ] | |
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