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PDF MSM5116165D Data sheet ( Hoja de datos )

Número de pieza MSM5116165D
Descripción DRAM / FAST PAGE MODE TYPE
Fabricantes OKI electronic componets 
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No Preview Available ! MSM5116165D Hoja de datos, Descripción, Manual

E2G0154-18-X1
¡¡SemicondSucetormiconductor
ThisMvSerMsi5o1n1: 6O16ct5.D19/D98SL
MSM5116165D/DSL
1,048,576-Word ¥ 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
DESCRIPTION
The MSM5116165D/DSL is a 1,048,576-word ¥ 16-bit dynamic RAM fabricated in Oki's silicon-gate
CMOS technology. The MSM5116165D/DSL achieves high integration, high-speed operation, and
low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/
double-layer metal CMOS process. The MSM5116165D/DSL is available in a 42-pin plastic SOJ or
50/44-pin plastic TSOP. The MSM5116165DSL (the self-refresh version) is specially designed for
lower-power applications.
FEATURES
• 1,048,576-word ¥ 16-bit configuration
• Single 5 V power supply, ±10% tolerance
• Input : TTL compatible, low input capacitance
• Output : TTL compatible, 3-state
• Refresh : 4096 cycles/64 ms, 4096 cycles/128 ms (SL version)
• Fast page mode with EDO, read modify write capability
CAS before RAS refresh, hidden refresh, RAS-only refresh capability
CAS before RAS self-refresh capability (SL version)
• Package options:
42-pin 400 mil plastic SOJ (SOJ42-P-400-1.27)
(Product : MSM5116165D/DSL-xxJS)
50/44-pin 400 mil plastic TSOP (TSOPII50/44-P-400-0.80-K)(Product : MSM5116165D/DSL-xxTS-K)
(TSOPII50/44-P-400-0.80-L) (Product : MSM5116165D/DSL-xxTS-L)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM5116165D/DSL-50
MSM5116165D/DSL-60
MSM5116165D/DSL-70
Access Time (Max.)
tRAC tAA tCAC tOEA
50 ns 25 ns 13 ns 13 ns
60 ns 30 ns 15 ns 15 ns
70 ns 35 ns 20 ns 20 ns
Cycle Time
Power Dissipation
(Min.) Operating (Max.) Standby (Max.)
84 ns
104 ns
124 ns
633 mW
578 mW
523 mW
5.5 mW/
1.1 mW (SL version)
1/17

1 page




MSM5116165D pdf
¡ Semiconductor
MSM5116165D/DSL
DC Characteristics
(VCC = 5 V ±10%, Ta = 0°C to 70°C)
Parameter
Symbol
Condition
MSM5116165 MSM5116165 MSM5116165
D/DSL-50 D/DSL-60 D/DSL-70 Unit Note
Min. Max. Min. Max. Min. Max.
Output High Voltage
VOH IOH = –5.0 mA
2.4 VCC 2.4 VCC 2.4 VCC V
Output Low Voltage
VOL IOL = 4.2 mA
0 0.4 0 0.4 0 0.4 V
0 V £ VI £ 6.5 V;
Input Leakage Current ILI All other pins not –10 10 –10 10 –10 10 mA
under test = 0 V
DQ disable
Output Leakage Current ILO 0 V £ VO £ VCC
–10 10 –10 10 –10 10 mA
Average Power
Supply Current
(Operating)
Power Supply
Current (Standby)
Average Power
Supply Current
(RAS-only Refresh)
Power Supply
Current (Standby)
RAS, CAS cycling,
ICC1 tRC = Min.
— 90 — 85 — 80 mA 1, 2
RAS, CAS = VIH
ICC2 RAS, CAS
VCC –0.2 V
RAS cycling,
ICC3 CAS = VIH,
tRC = Min.
RAS = VIH,
ICC5 CAS = VIL,
DQ = enable
— 2 — 2— 2
mA 1
— 1 — 1— 1
— 200 — 200 — 200 mA 1, 5
— 90 — 85 — 80 mA 1, 2
— 5 — 5 — 5 mA 1
Average Power
RAS cycling,
Supply Current
(CAS before RAS Refresh)
ICC6
CAS before RAS
Average Power
RAS = VIL,
Supply Current
ICC7 CAS cycling,
— 90 — 85 — 80 mA 1, 2
— 115 — 105 — 95 mA 1, 3
(Fast Page Mode)
Average Power
Supply Current
(Battery Backup)
tHPC = Min.
tRC = 125 ms,
ICC10 CAS before RAS,
tRAS £ 1 ms
1, 4,
— 400 — 400 — 400 mA
5
Average Power
Supply Current
(CAS before RAS
RAS £ 0.2 V,
ICCS CAS £ 0.2 V
— 300 — 300 — 300 mA 1, 5
Self-Refresh)
Notes : 1. ICC Max. is specified as ICC for output open condition.
2. The address can be changed once or less while RAS = VIL.
3. The address can be changed once or less while CAS = VIH.
4. VCC – 0.2 V £ VIH £ VCC + 0.5 V, –0.5 V £ VIL £ 0.2 V.
5. SL version.
5/17

5 Page





MSM5116165D arduino
¡ Semiconductor
MSM5116165D/DSL
Fast Page Mode Read Cycle (Part-1)
RAS
VIH
VIL
,,,,CAS
VIH
VIL
tCRP
tASR
tRCD
tCAS
tRAD
tRAH
tCSH
tASC tCAH
tRASP
tHPC
tCP
tCAS
tASC tCAH
tRHCP
tCP
tCAS
tRP
tASC tCAH
Address
VIH
VIL
Row
Column
Column
Column
tRCS
tRRH
WE
VIH
VIL
OE
VIH
VIL
DQ
VOH
VOL
tRAC
tAA
tOEA
tCAC
tCLZ
FastPageModeReadCycle(Part-2)
tCHO
tOCH
tCPA
tDOH
Valid
Data-out
tOEP
tAA
tAA
tOEP
tOEA tOEA
tCAC
tOEZ tCAC tOEZ
tREZ
Valid
Data-out
Valid*
Data-out
Valid*
Data-out
* : Same Data,
"H" or "L"
tRASP
tRP
RAS
VIH
VIL
tCRP
tRCD
tRHCP
tHPC
tCP tCP
tCRP
CAS
VIH
VIL
tRAD
tCAS
tCAS tCAS
Address
VIH
VIL
WE
VIH
VIL
,,OE
VIH
VIL
tCSH
tASR tRAH tASC tCAH
Row Column
tRCS
tRAC
tAA
tRCH
tASC tCAH
Column
tRCS
tWPE tAA
tOEA
tCAC tWEZ
tCAC
tASC tCAH
Column
tAA
tCPA
tCAC
tDOH
tCEZ
DQ
VOH
VOL
Valid
tCLZ Data-out
Valid
Data-out
Valid
Data-out
"H" or "L"
11/17

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