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What is UM6522?

This electronic component, produced by the manufacturer "UMC", performs the same function as "VERSATILE INTERFACE ADAPTER".


UM6522 Datasheet PDF - UMC

Part Number UM6522
Description VERSATILE INTERFACE ADAPTER
Manufacturers UMC 
Logo UMC Logo 


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UM6522/ UM6522A
Versatile Interface Adapter(VIA)
Features
• Two 8-bit bidirectional I/O ports
• Two 16-bit programmable timer/counters
• Serial data port
• Single +5V power supply
• TTL compatible expect Port A
• CMOS compatible peripheral Port A lines
• Expanded "handshake" capability allows positive
control of data transfers between processor and periph-
eral devices
• Latched output and input registers
• 1 MHz and 2 MHz operation
General Description
The UM6522 Versatile Interface Adapter (VIA) is a very
flexible I/O control device. In addition, this device con-
tains a pair of very powerful 16-bit interval timers, a serial-
to-parallel/parallel-to-serial shift register and input data
latching on the peripheral ports. Expanded handshaking
capability allows control of bi-directional data transfers
between VIA's in multiple processor systems.
Control of peripheral devices is handled primarily through
two 8-bit bi-directional ports. Each line can be program-
med as either an input or an output. Serveral peripheral
I/O lines can be controlled directly from the interval timers
for generating programmable frequency square waves or
for counting externally generated pulses. To facilitate
control of the many powerful features of this chip, an
interrupt flag register, an interrupt enable register and a
pair of function control registers are provided.
Pin· Configuration
VSS
PAO
PAl
PA2
PA3
PA4
PA5
PA6
PA7
PBO
PBl
PB2
PB3
PB4
PB5
PB6
PB7
CBl
CB2
VCC
Block Diagram
CAl
CA2
RSO
RSl
RS2
RS3
RES
00
01
02
03
04
05
06
07
<1>2
CSl
CS2
R/Iii
IRQ
DATA
BUS
AS3
1----+-+---- CB1
1 - - - - * - - - _ ce2
PORTB
7':"'63

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UM6522 equivalent
(l)UMC
UM6522/ UM6522A
READ IRA
OPERATION
'------------------f/~'-------------------
CA2
"DATA TAKEN"
~---....off
~~CAl
t"DATAR EAD Y" - - - - - - - - - - - - - - - - - - - - - - - - -......----------------...."
ACTIVE
~I-::::TRS2?
--"""-------___
~
TRANSITION
Figure 5b. CA2 Timing for Read Handshake, Handshake Mode
¢2~
WRITE ORA, ORB
-
OPERATION
---./
/
"
~
CA2,CB2
"DATA READY"
~
PA, PB
PERIPHERAL DATA
r " r "i r-J~ i---r I---TWHS
TRS3
.r-
TOS ~
Figure 5c. CA2, CB2 Timing for Write Handshake, Pulse Mode
WRITE ORA, 0: ~"'::::::-/----'\.-"---t TWHS"--, ~
OPE RAT 10 N
' -_______________+_-< ;
CA2,CB2
"DATA READY"
TDS
PA, PB
-+__PERIPHERAL DATA _~~~~~~~~~~~~.~ _______________~~ ~______________
;=>l"CDAAl.TCABTl A KEN" ________________________________________ '
~--TRS4
_ _ _ _ _ _ _ _ _ __
ACTIVE
~
TRANSITION
Figure 5d. CA2, CB2 Timing for Write Handshake, Handshake Mode
PA, PB
PERIPHERAL
~TIL~TPO;r,,------INPUT DATA
---------------1=CAl, CBl
INPUT LATCHING
CONTROL
TAL :::'$=--~-~-~-I~-i-IT-I-O-N----------------
Figure 5e. Peripheral Data Input Latching Timing
7-67


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Part Details

On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for UM6522 electronic component.


Information Total 17 Pages
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