74FST3383 Datasheet PDF - ON
Part Number | 74FST3383 | |
Description | 10-Bit Low Power Bus Exchange | |
Manufacturers | ON | |
Logo | ||
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10−Bit Low Power
Bus Exchange
The ON Semiconductor 74FST3383 is a 10−bit low power bus
exchange. The device is CMOS TTL compatible when operating
between 4 and 5.5 Volts. The device exhibits extremely low RON and
adds nearly zero propagation delay. The device adds no noise or
ground bounce to the system.
Features
• RON t 4 W Typical
• Less Than 0.25 ns−Max Delay Through Switch
• Nearly Zero Standby Current
• No Circuit Bounce
• Control Inputs are TTL/CMOS Compatible
• Pin−For−Pin Compatible With QS3383, FST3383, CBT3383
• All Popular Packages: SOIC−24, TSSOP−24, QSOP−24
• All Devices in Package TSSOP are Inherently Pb−Free*
OE
C0
A0
B0
D0
C1
A1
B1
D1
C2
A2
GND
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 16
10 15
11 14
12 13
VCC
D4
B4
A4
C4
D3
B3
A3
C3
D2
B2
BX
Figure 1. 24−Lead Pinout
TRUTH TABLE
OE BX
A0−A4
B0−B4
Function
H X HIGH−Z State HIGH−Z State Disconnect
LL
C0−C4
D0−D4
Connect
LH
D0−D4
C0−C4
Exchange
NOTE: H = HIGH Voltage Level, L = LOW Voltage Level, X = Don’t Care
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
January, 2005 − Rev. 5
1
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MARKING
DIAGRAMS
24
1
SOIC−24
DW SUFFIX
CASE 751E
24
FST3383
AWLYWW
1
24
1
TSSOP−24
DT SUFFIX
CASE 948H
24
FST
3383
ALYW
1
24
1
QSOP−24
QS SUFFIX
CASE 492B
24
FST3383
AWLYYWW
1
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
PIN NAMES
Pin
OE
BX
A0−A4, B0−B4
C0−C4, D0−D4
Description
Bus Switch Enable
Bus Exchange
Buses A, B
Buses C, D
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
74FST3383/D
|
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74FST3383
AC Loading and Waveforms
FROM
OUTPUT
UNDER
TEST
VI
500 W
CL* 500 W
NOTES:
1. Input driven by 50 W source terminated in 50 W.
2. CL includes load and stray capacitance.
*CL = 50 pF
Figure 3. AC Test Circuit
SWITCH
INPUT
10 %
tPLH
tf = 2.5 nS
90 %
1.5 V
90 %
1.5 V
OUTPUT
1.5 V
tf = 2.5 nS
3.0 V
10 %
GND
tPLH
VOH
1.5 V
VOL
Figure 4. Propagation Delays
ENABLE
INPUT
tf = 2.5 nS
90 %
1.5 V
tPZL
OUTPUT
tPZH
OUTPUT
10 % 10 %
1.5 V
1.5 V
tf = 2.5 nS
90 % 3.0 V
1.5 V
GND
tPZL
VOL + 0.3 V
VOL
tPHZL
VOH
VOH − 0.3 V
Figure 5. Enable/Disable Delays
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Information | Total 8 Pages | |
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