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What is 74F674?

This electronic component, produced by the manufacturer "Philips", performs the same function as "16-bit serial/parallel-in / serial-out shift register 3-State".


74F674 Datasheet PDF - Philips

Part Number 74F674
Description 16-bit serial/parallel-in / serial-out shift register 3-State
Manufacturers Philips 
Logo Philips Logo 


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Philips Semiconductors
16-bit serial/parallel-in, serial-out shift register (3-State)
Product specification
74F674
FEATURES
16-bit serial I/O shift register
16-bit parallel-in/serial-out converter
Recirculating serial shifting
Common serial data I/O pin (3-State)
DESCRIPTION
The 74F674 is a 16-bit shift register with serial and parallel load
capability and serial output. A single pin serves alternately as an
input for serial entry or as a 3-State serial output. In the serial out
mode the data recirculates in the register. Chip Select, Read/Write
and Mode inputs provide control flexibility. The 74F674 operates in
one of four modes, as indicated in the Function table.
Hold: A High signal on the Chip Select (CS) input prevents clocking
and forces the Serial Input/Output (SI/O) 3-State buffer into the high
impedance state.
Serial load: Data present on the SI/O pin shifts into the register on
the falling edge of CP. Data enters the Q0 position and shifts toward
Q15 on successive clocks.
Serial output: The SI/O 3-State buffer is active and the register
contents are shifted out from Q15 and simultaneously shifted back
into Q0.
Parallel load: Data present on D0–D15 is entered into the register
on the falling edge of CP. The SI/O 3-State buffer is active and
represents the Q15 output. To prevent false clocking, CP must be
Low during a Low-to-High transition of CS.
PIN CONFIGURATION
CS 1
CP 2
R/W 3
NC 4
M5
SI/O 6
D0 7
D1 8
D2 9
D3 10
D4 11
GND 12
24 VCC
23 D15
22 D14
21 D13
20 D12
19 D11
18 D10
17 D9
16 D8
15 D7
14 D6
13 D5
SF01188
TYPE
74F674
TYPICAL fMAX
95MHz
TYPICAL SUPPLY
CURRENT
(TOTAL)
55mA
ORDERING INFORMATION
DESCRIPTION
24-Pin Plastic Slim DIP
(300mil)
COMMERCIAL RANGE
VCC = 5V ±10%, Tamb = 0°C to +70°C
N74F674N
24-Pin Plastic SOL
N74F674D
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
D0–D15
Parallel data inputs
1.0/1.0
CS Chip Select input (active Low)
1.0/1.0
CP Clock Pulse input (active falling edge)
1.0/1.0
M Mode select input
1.0/1.0
R/W Read/Write input
1.0/1.0
SI/O
Serial data input or
Serial 3-state output
NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
3.5/1.0
150/40
LOAD VALUE
HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
70mA/0.6mA
3.0mA/24mA
1989 Feb 05
1 853–1248 92263

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74F674 equivalent
Philips Semiconductors
16-bit serial/parallel-in, serial-out shift register (3-State)
Product specification
74F674
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
CP
SI/O
1/fMAX
VM
tW(L)
tPLH
VM
tW(H)
VM
VM
tPHL
VM
SF01192
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
Dn, CS,
M, R/W,
SI/O
CP
VM VM
ts(H) th(H)
VM
VM VM
ts(L) th(L)
VM
Waveform 2. Setup and Hold Times
SF01193
CS, R/W
SI/O
VM
tPZH
VM
VM
tPHZ
VOH -0.3V
0V
SF01194
Waveform 3. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
TEST CIRCUIT AND WAVEFORM
CS, R/W
VM
VM
tPZL
tPLZ
SI/O
VM
VOL +0.3V
SF01195
Waveform 4. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
VCC
PULSE
GENERATOR
VIN
VOUT
D.U.T.
RL
RT CL RL
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST
tPLZ
tPZL
All other
SWITCH
closed
closed
open
7.0V
90%
NEGATIVE
PULSE
POSITIVE
PULSE
10%
tw
VM
10%
tTHL (tf )
VM
10%
tTLH (tr )
tTLH (tr )
90%
VM
tw
tTHL (tf )
90%
VM
Input Pulse Definition
90%
AMP (V)
0V
AMP (V)
10%
0V
DEFINITIONS:
RL = Load resistor;
see AC electrical characteristics for value.
CL = Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
INPUT PULSE REQUIREMENTS
family
amplitude VM rep. rate
tw tTLH
74F 3.0V 1.5V 1MHz 500ns 2.5ns
tTHL
2.5ns
SF00777
1989 Feb 05
5


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