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PDF 74F579SC Data sheet ( Hoja de datos )

Número de pieza 74F579SC
Descripción 8-Bit Bidirectional Binary Counter with 3-STATE Outputs
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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No Preview Available ! 74F579SC Hoja de datos, Descripción, Manual

April 1988
Revised August 1999
74F579
8-Bit Bidirectional Binary Counter with 3-STATE Outputs
General Description
The 74F579 is a fully synchronous 8-stage up/down
counter with multiplexed 3-STATE I/O ports for bus-ori-
ented applications. It features a preset capability for pro-
grammable operation, carry lookahead for easy cascading
and a U/D input to control the direction of counting. All state
changes, whether in counting or parallel loading, are initi-
ated by the rising edge of the clock.
Features
s Multiplexed 3-STATE I/O ports
s Built-in lookahead carry capability
s Count frequency 100 MHz typical
s Supply current 75 mA typical
s Guaranteed 4000V minimum ESD protection
Ordering Code:
Order Number Package Number
Package Description
74F579SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F579SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F579PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” tot he ordering code.
Logic Symbol
Connection Diagram
© 1999 Fairchild Semiconductor Corporation DS009568
www.fairchildsemi.com

1 page




74F579SC pdf
AC Electrical Characteristics
Symbol
Parameter
fMAX
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPHL
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
Maximum Clock Frequency
Propagation Delay
CP to I/On
Propagation Delay
CP to TC
Propagation Delay
U/D to TC
Propagation Delay
CEP or CET to TC
Propagation Delay
MR to I/On
Propagation Delay
MR to TC
Output Enable Time
CS or PE to I/O
Output Disable Time
CS or PE to I/O
Output Enable Time
OE to I/On
Output Disable Time
OE to I/On
AC Operating Requirements
Symbol
Parameter
tS(H)
tS(L)
tH(H)
tH(L)
tS(H)
tS(L)
tH(H)
tH(L)
tS(H)
tS(L)
tH(H)
tH(L)
tS(H)
tS(L)
tH(H)
tH(L)
tW(H)
tW(L)
tW(L)
tREC
Setup Time
I/On to CP
Hold Time
I/On to CP
Setup Time
PE, CS or SR to CP
Hold Time
PE, CS or SR to CP
Setup Time
CET or CEP to CP
Hold Time
CET or CEP to CP
Setup Time
U/D to CP
Hold Time
U/D to CP
Clock Pulse Width
HIGH or LOW
MR Pulse Width
Recovery Time
MR to CP
TA = +25°C
VCC = +5.0V
CL = 50 pF
Min Typ Max
70 85
3.0 5.0 7.5
5.0 8.0 11.5
5.0 7.5 11.5
5.0 7.0 11.5
4.5 7.0 9.0
4.5 8.0 9.5
2.5 3.8 6.0
3.5 6.0 8.0
5.0 7.5 10.0
6.5
10.0
13.0
3.0 5.0 8.5
5.5 8.0 10.5
2.0 5.0 8.5
2.0 4.5 8.0
3.0 5.0 8.0
5.0 8.0 11.0
2.0 4.0 6.5
2.0 4.0 6.0
TA = 0°C to +70°C
VCC = +5.0V
CL = 50 pF
Min Max
80
3.0 8.0
5.0 11.5
5.0 12.0
5.0 12.0
4.5 10.0
4.5 10.0
2.5 6.5
3.5 8.5
5.0 10.0
6.5 13.5
3.0 9.0
5.5 11.5
2.0 9.0
2.0 8.5
3.0 8.5
5.0 12.0
2.0 6.5
2.0 6.5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TA = +25°C
VCC = +5.0V
Min Typ Max
4.0
4.0
0.0
0.0
9.5
9.5
0.0
0.0
6.5
9.5
0.0
0.0
9.0
9.0
0.0
0.0
4.5
4.5
3.0
4.0
TA = 0°C to +70°C
VCC = +5.0V
Min Max
4.0
4.0
0.0
0.0
9.5
9.5
0.0
0.0
6.5
9.5
0.0
0.0
9.5
9.5
0.0
0.0
4.5
4.5
3.0
4.0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5 www.fairchildsemi.com

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