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PDF 1430G5 Data sheet ( Hoja de datos )

Número de pieza 1430G5
Descripción NetLight 1430G5 Type SONET/SDH Long-Reach Transceivers with Clock Recovery
Fabricantes Agere Systems 
Logotipo Agere Systems Logotipo



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No Preview Available ! 1430G5 Hoja de datos, Descripción, Manual

Data Sheet, Rev 1.
August 2001
NetLight ® 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Available in a small form factor, plastic package, the
1430G5 are high-performance, cost-effective transceivers for
SONET/SDH long-reach applications at 155 Mbits/s.
Features
s SONET LR-1/SDH L1.1 Compliant (ITU-T G.957
Specifications)
s Small form factor, RJ-45 size, multisourced 20-pin
package
s Requires single 3.3 V power supply
s Clock recovery
s Fiber pigtail
s Uncooled 1300 nm laser transmitter with automatic
output power control
s Transmitter disable input
s Analog alarm outputs
s Wide dynamic range receiver with InGaAs PIN
photodetector
s LVTTL signal-detect output
s Low power dissipation
s Raised ECL (LVPECL) logic data interfaces
s Operating case temperature range: –40 °C to
+85 °C
s Agere Systems Inc. Reliability and Qualification
Program for built-in quality and reliability
Description
The 1430G5-Type transceiver is a high-speed, cost-
effective optical transceiver that is compliant with the
International Telecommunication Union Telecommu-
nication (ITU-T) G.957 specifications for use in
SONET and SDH long-reach applications. The
1430G5 operates at the OC-3/STM-1 rate of
155 Mbits/s. The transceiver features Agere Sys-
tems’ optics and is packaged in a narrow-width plas-
tic housing with two 1 meter fiber pigtails terminated
with LC connectors. The 20-pin package and pinout
conform to a multisource transceiver agreement.
The transmitter features differential LVPECL logic
level data inputs, a LVTTL logic level disable input.
The receiver features differential LVPECL logic level
data and clock outputs, and a LVTTL logic level
signal-detect output.

1 page




1430G5 pdf
Data Sheet, Rev 1.
August 2001
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Application Information (continued)
Table 3. Receiver Optical and Electrical Characteristics (TC = –40 °C to +85 °C; VCC = 3.135 V—3.465 V)
Parameter
Average Sensitivity:*
L-1.1
Maximum Input Power L-1.1*
Link Status Switching Threshold:
Decreasing Light L-1.1
Increasing Light L-1.1
Link Status Hysteresis
Power Supply Current
Output Data Voltage/Clock Voltage:
Low
High
Signal Detect Output Voltage:
Low
High
Clock Duty Cycle
Output Clock Random Jitter
Output Clock Random Jitter Peaking
Clock/Data Alignment L-1.1 (See Figure 2.)
Jitter Tolerance/Jitter Transfer
* For 1 x 10–10 BER with an optical input using 223 – 1 PRBS.
Symbol
Min
Max
Unit
PI
PMAX
–10
–34 dBm
— dBm
LSTD
–45
–35 dBm
LSTI
–34.5
dBm
HYS
0.5
6.0 dB
ICCR
200 mA
VOL VCC – 1.86 VCC – 1.50
VOH VCC – 1.025 VCC – 0.88
V
V
VOL 0.0 0.8 V
VOH 2.4 VCC V
DC 45
55 %
JC — 0.01 UI
JP — 0.1 dB
TCDA
–0.8
0.8
ns
Telcordia Technologies™ GR-253-CORE and
ITU-TG.958 Compliant
DATAOUT
50%
CLOCKOUT
50%
TCDA
Figure 2. Clock/Data Alignment
1-725(F).b
Agere Systems Inc.
5

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