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Número de pieza | M74HC4514 | |
Descripción | HC4514: 4 TO 16 LINE DECODER/LATCH HC4515: 4 TO 16 LINE DECODER LATCH INV. | |
Fabricantes | ST Microelectronics | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de M74HC4514 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
No Preview Available ! M74HC4514
4 TO 16 LINE DECODER/LATCH
s HIGH SPEED:
tPD= 20 ns (TYP.) at VCC = 6V
s LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4514
DESCRIPTION
The M74HC4514 is an high speed CMOS 4 LINE
TO 16 LINE SEGMENT DECODER WITH
LATCHED INPUTS fabricated with silicon gate
C2MOS technology.
A binary code stored in the four input latches (A to
D) provides a high level at the selected one of
sixteen outputs excluding the other fifteen outputs,
when the inhibit input (INHIBIT) is held low. When
the inhibit input (INHIBIT) is held high, all outputs
are kept low level, while the latch function is
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
DIP
SOP
TSSOP
M74HC4514B1R
M74HC4514M1R M74HC4514RM13TR
M74HC4514TTR
available. The data applied to the data inputs are
transferred to the Q outputs of latches when the
strobe input is held high. When the strobe input is
taken low, the information data applied to the data
input at a time is retained at the output of the
latches.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2003
1/12
1 page M74HC4514
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
Test Condition
Value
Symbol
Parameter
VCC
(V)
tTLH tTHL Output Transition
Time
tPLH tPHL Propagation Delay
Time
(DATA - Sn)
tPLH tPHL Propagation Delay
Time
(STROBE- Sn.)
tPLH tPHL Propagation Delay
Time
(INHIBIT - Sn)
tW(L)
Minimum Pulse
Width
(STROBE)
ts Minimum Set Up
Time
(DATA)
th Minimum Hold
Time
(DATA)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
30 75
95 110
8 15 19 25 ns
7 13 16 23
65 175 220 230
22 35 44 56 ns
19 30 37 45
75 175 220 260
24 35 44 56 ns
20 30 37 45
60 175 220 260
20 35 44 56 ns
17 30 37 45
14 75
95 110
6 15 19 26 ns
6 13 16 23
10 50 65 80
2 10 13 20 ns
19
11 17
555
5 5 5 ns
555
CAPACITIVE CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
VCC
(V)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
CIN Input Capacitance
5 10 10 10 pF
CPD Power Dissipation
Capacitance (note
1)
61
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
5/12
5 Page DIM.
A
C
D
N
T
Ao
Bo
Ko
Po
P
M74HC4514
Tape & Reel TSSOP24 MECHANICAL DATA
MIN.
12.8
20.2
60
6.8
8.2
1.7
3.9
11.9
mm.
TYP
MAX.
330
13.2
22.4
7
8.4
1.9
4.1
12.1
MIN.
0.504
0.795
2.362
0.268
0.323
0.067
0.153
0.468
inch
TYP.
MAX.
12.992
0.519
0.882
0.276
0.331
0.075
0.161
0.476
11/12
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet M74HC4514.PDF ] |
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