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What is 74VHC573?

This electronic component, produced by the manufacturer "STMicroelectronics", performs the same function as "OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING".


74VHC573 Datasheet PDF - STMicroelectronics

Part Number 74VHC573
Description OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
Manufacturers STMicroelectronics 
Logo STMicroelectronics Logo 


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® 74VHC573
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUT NON INVERTING
s HIGH SPEED: tPD = 5.0 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA = 25 oC
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 573
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: VOLP = 0.9V (Max.)
DESCRIPTION
The 74VHC573 is an advanced high-speed
CMOS OCTAL D-TYPE LATCH with 3 STATE
OUTPUT NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
This 8 bit D-Type latch is controlled by a latch
enable input (LE) and an output enable input
(OE).
While the LE input is held at a high level, the Q
PIN CONNECTION AND IEC LOGIC SYMBOLS
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHC573M
74VHC573T
outputs will follow the data inputs precisely.
When the LE is taken low, the Q outputs will be
latched precisely at the logic level of D input data.
While the (OE) input is low, the 8 outputs will be
in a normal logic state (high or low logic level)
and while high level the outputs will be in a high
impedance state.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
June 1999
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74VHC573 equivalent
74VHC573
DYNAMIC SWITCHING CHARACTERISTICS
Symb ol
Parameter
Test Conditions
V CC
( V)
Value
TA = 25 oC
Min. Typ. Max.
-40 to 85 oC
Min . Max.
Un it
VOLP
VOLV
VIHD
Dynamic Low Voltage
Quiet Output (note 1, 2)
Dynamic High Voltage
Input (note 1, 3)
5.0
5.0
CL = 50 pF
0.6 0.9
-0.9 -0.6
3.5
V
VILD Dynamic Low Voltage
Input (note 1, 3)
5.0
1.5
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n -1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.
TEST CIRCUIT
TEST
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
CL = 15/50 pF or equivalent (includes jig and probe capacitance)
RL = R1 = 1Korequivalent
RT = ZOUT of pulse generator (typically 50)
SW IT CH
Open
VCC
GND
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Part Details

On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 74VHC573 electronic component.


Information Total 10 Pages
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Featured Datasheets

Part NumberDescriptionMFRS
74VHC573The function is OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING. STMicroelectronicsSTMicroelectronics
74VHC573The function is Octal D-Type Latch with 3-STATE Outputs. Fairchild SemiconductorFairchild Semiconductor
74VHC573MThe function is OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING. STMicroelectronicsSTMicroelectronics

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