74VHC244 Datasheet PDF - STMicroelectronics
Part Number | 74VHC244 | |
Description | OCTAL BUS BUFFER WITH 3 STATE OUTPUTS NON INVERTED | |
Manufacturers | STMicroelectronics | |
Logo | ||
There is a preview and 74VHC244 download ( pdf file ) link at the bottom of this page. Total 8 Pages |
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OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (NON INVERTED)
s HIGH SPEED: tPD = 3.9 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA = 25 oC
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 244
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE VOLP = 0.9V (Max.)
DESCRIPTION
The 74VHC244 is an advanced high speed
CMOS OCTAL BUS BUFFER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
G output enable governs four BUS BUFFERs.
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHC244M
74VHC244T
This device is designed to be used with 3 state
memory address drivers, etc.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 1999
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WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
74VHC244
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
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Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 74VHC244 electronic component. |
Information | Total 8 Pages | |
Link URL | [ Copy URL to Clipboard ] | |
Download | [ 74VHC244.PDF Datasheet ] |
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