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PDF 74VCX32374 Data sheet ( Hoja de datos )

Número de pieza 74VCX32374
Descripción Low Voltage 32-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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December 2000
Revised November 2002
74VCX32374
Low Voltage 32-Bit D-Type Flip-Flops
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX32374 contains thirty-two non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. A buff-
ered clock (CP) and output enable (OE) are common to
each byte and can be shorted together for full 32-bit opera-
tion.
The 74VCX32374 is designed for low voltage (1.2V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74VCX32374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.2V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
3.0 ns max for 3.0V to 3.6V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion and withdrawal (Note 1)
s Static Drive (IOH/IOL)
±24 mA @ 3.0V VCC
s Uses patented noise/EMI reduction circuitry
s Latch-up performance exceeds 300 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
s Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Descriptions
74VCX32374G
(Note 2)(Note 3)
BGA96A
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Note 2: Ordering code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2002 Fairchild Semiconductor Corporation DS500402
www.fairchildsemi.com

1 page




74VCX32374 pdf
DC Electrical Characteristics (Continued)
Symbol
Parameter
VOL LOW Level Output Voltage
II Input Leakage Current
IOZ 3-STATE Output Leakage
IOFF Power-OFF Leakage Current
ICC Quiescent Supply Current
ICC
Increase in ICC per Input
Note 7: Outputs disabled or 3-STATE only.
Conditions
IOL = 100 µA
IOL = 12 mA
IOL = 18 mA
IOL = 24 mA
IOL = 100 µA
IOL = 12 mA
IOL = 18 mA
IOL = 100 µA
IOL = 6 mA
IOL = 100 µA
IOL = 2 mA
IOL = 100 µA
0 VI 3.6V
0 VO 3.6V
VI = VIH or VIL
0 (VI, VO) 3.6V
VI = VCC or GND
VCC (VI, VO) 3.6V (Note 7)
VIH = VCC 0.6V
VCC
(V)
2.7 3.6
2.7
3.0
3.0
2.7 - 2.7
2.3
2.3
1.65 - 2.3
1.65
1.4 - 1.6
1.4
1.2
1.2 - 3.6
1.2 - 3.6
0
1.2 - 3.6
1.2 - 3.6
2.7 - 3.6
Min
Max
0.2
0.4
0.4
0.55
0.2
0.4
0.6
0.2
0.3
0.2
0.35
0.05
±5.0
±10
10
40
±40
750
AC Electrical Characteristics (Note 8)
Symbol
Parameter
fMAX
Maximum Clock Frequency
Setup Time
tPHL,
tPLH
Propagation Delay
tPZL,
tPZH
Output Enable Time
tPLZ,
tPHZ
Output Disable Time
tS Setup Time
Conditions
CL = 30 pF, RL = 500
CL = 15 pF, RL = 2k
CL = 30 pF, RL = 500
CL = 15 pF, RL = 2k
CL = 30 pF, RL = 500
CL = 15 pF, RL = 2k
CL = 30 pF, RL = 500
CL = 15 pF, RL = 2k
CL = 30 pF, RL = 500
CL = 15 pF, RL = 500
VCC
(V)
3.3 ± 0.3
2.5 ± 0.2
1.8 ± 0.15
1.5 ± 0.1
1.2
3.3 ± 0.3
2.5 ± 0.2
1.8 ± 0.15
1.5 ± 0.1
1.2
3.3 ± 0.3
2.5 ± 0.2
1.8 ± 0.15
1.5 ± 0.1
1.2
3.3 ± 0.3
2.5 ± 0.2
1.8 ± 0.15
1.5 ± 0.1
1.2
3.3 ± 0.3
2.5 ± 0.2
1.8 ± 0.15
1.5 ± 0.1
1.2
TA = −40°C to +85°C
Min Max
250
200
100
80
40
0.8 3.0
1.0 3.9
1.5 7.8
1.0 15.6
1.5 39
0.8 3.5
1.0 4.6
1.5 9.2
1.0 18.4
1.5 46
0.8 3.5
1.0 3.8
1.5 6.8
1.0 13.6
1.5 34
1.5
1.5
2.5
3
6
Units
MHz
ns
ns
ns
ns
Units
V
µA
µA
µA
µA
µA
µA
Figure
Number
Figures
1, 2
Figures
7, 8
Figures
1, 3, 4
Figures
7, 9, 10
Figures
1, 3, 4
Figures
7, 9, 10
Figures
1, 6
Figures
6, 7
5 www.fairchildsemi.com

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