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PDF 74VCX132 Data sheet ( Hoja de datos )
| Número de pieza | 74VCX132 | |
| Descripción | Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs | |
| Fabricantes | Fairchild Semiconductor | |
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July 1999
Revised February 2005
74VCX132
Low Voltage Quad 2-Input NAND Gate
with Schmitt Trigger Inputs
and 3.6V Tolerant Inputs and Outputs
General Description
Features
The VCX132 contains four 2-input NAND gates with
Schmitt Trigger Inputs. The pin configuration and function
are the same as the VCX00 except the inputs have hyster-
esis between the positive-going and negative-going input
thresholds. This hysteresis is useful for transforming slowly
switching input signals into sharply defined, jitter-free out-
put signals. This product should be used where noise mar-
gin greater than that of conventional gates is required.
The VCX132 is designed for low voltage (1.4V to 3.6V) VCC
applications with I/O compatibility up to 3.6V.
s 1.4V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
3.3 ns max for 3.0V to 3.6V VCC
s Power-off high impedance inputs and outputs
s Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
s Uses patented Quiet Series¥ noise/EMI reduction
This product is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
circuitry
s Latchup performance exceeds JEDEC 78 conditions
s ESD performance:
Human body model ! 2000V
Machine model ! 250V
www.DataSsheLete4Ua.dcolemss Pb-Free DQFN package
Ordering Code:
Order Number Package Number
Package Description
74VCX132M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74VCX132BQX
(Note 1)
MLP014A
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
74VCX132MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: DQFN package available in Tape and Reel only.
Quiet Series¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500164
www.fairchildsemi.com
1 page  
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
VOHV
Quiet Output Dynamic Valley VOH
Conditions
CL 30 pF, VIH VCC, VIL 0V
CL 30 pF, VIH VCC, VIL 0V
CL 30 pF, VIH VCC, VIL 0V
VCC TA 25qC
(V) Typical
1.8 0.25
2.5 0.6
3.3 0.8
1.8 0.25
2.5 0.6
3.3 0.8
1.8 1.5
2.5 1.9
3.3 2.2
Capacitance
Symbol
Parameter
CIN
COUT
CPD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Conditions
TA 25qC
Typical
VI 0V or VCC, VCC 1.8V, 2.5V or 3.3V
VI 0V or VCC, VCC 1.8V, 2.5V or 3.3V
VI 0V or VCC, f 10MHz, VCC 1.8V, 2.5V or 3.3V
6.0
7.0
20.0
Units
V
V
V
Units
pF
pF
pF
AC Loading and Waveforms (VCC 3.3V r 0.3V to 1.8V r 0.15V)
FIGURE 1. AC Test Circuit
TEST
tPLH, tPHL
SWITCH
Open
FIGURE 2. Waveform for Inverting and Non-inverting Functions
Symbol
Vmi
Vmo
3.3V r 0.3V
1.5V
1.5V
VCC
2.5V r 0.2V
VCC/2
VCC/2
1.8V r 0.15V
VCC/2
VCC/2
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet 74VCX132.PDF ] | |
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