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PDF 74LVTH16652MTD Data sheet ( Hoja de datos )
| Número de pieza | 74LVTH16652MTD | |
| Descripción | Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs | |
| Fabricantes | Fairchild Semiconductor | |
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January 2000
Revised January 2000
74LVTH16652
Low Voltage 16-Bit Transceiver/Register
with 3-STATE Outputs
General Description
The LVTH16652 consists of sixteen bus transceiver circuits
with D-type flip-flops, and control circuitry arranged for mul-
tiplexed transmission of data directly from the input bus or
from the internal registers. Each byte has separate control
inputs which can be shorted together for full 16-bit opera-
tion. Data on the A or B bus will be clocked into the regis-
ters as the appropriate clock pin goes to the HIGH logic
level. Output Enable pins (OEAB, OEBA) are provided to
control the transceiver function (see Functional Descrip-
tion).
The LVTH16652 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
The transceivers are designed for low-voltage (3.3V) VCC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVTH16652 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining low
power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs source/sink −32 mA/+64 mA
s Functionally compatible with the 74 series 16652
s Latch-up performance exceeds 500 mA
Ordering Code:
Order Number Package Number
Package Description
74LVTH16652MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
74LVTH16652MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
© 2000 Fairchild Semiconductor Corporation DS012024
www.fairchildsemi.com
1 page  
Absolute Maximum Ratings(Note 2)
Symbol
VCC
VI
VO
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
IIK DC Input Diode Current
IOK DC Output Diode Current
IO DC Output Current
ICC
IGND
TSTG
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
−0.5 to +4.6
−0.5 to +7.0
−0.5 to +7.0
−0.5 to +7.0
−50
−50
64
128
±64
±128
−65 to +150
Conditions
Output in 3-STATE
Output in HIGH or LOW State (Note 3)
VI < GND
VO < GND
VO > VCC Output at HIGH State
VO > VCC Output at LOW State
Units
V
V
V
mA
mA
mA
mA
mA
°C
Recommended Operating Conditions
Symbol
Parameter
Min
Max
Units
VCC Supply Voltage
2.7 3.6 V
VI Input Voltage
0 5.5 V
IOH HIGH-Level Output Current
−32 mA
IOL LOW-Level Output Current
64 mA
TA Free-Air Operating Temperature
−40 85 °C
∆t/∆V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
0 10 ns/V
Note 2: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 3: IO Absolute Maximum Rating must be observed.
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| PDF Descargar | [ Datasheet 74LVTH16652MTD.PDF ] | |
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