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What is 74LVTH16646MTD?

This electronic component, produced by the manufacturer "Fairchild Semiconductor", performs the same function as "Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs".


74LVTH16646MTD Datasheet PDF - Fairchild Semiconductor

Part Number 74LVTH16646MTD
Description Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs
Manufacturers Fairchild Semiconductor 
Logo Fairchild Semiconductor Logo 


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January 2000
Revised January 2000
74LVTH16646
Low Voltage 16-Bit Transceiver/Register
with 3-STATE Outputs
General Description
The LVTH16646 contains sixteen non-inverting bidirec-
tional registered bus transceivers providing multiplexed
transmission of data directly from the input bus or from the
internal storage registers. Each byte has separate control
inputs which can be shorted together for full 16-bit opera-
tion. The DIR inputs determine the direction of data flow
through the device. The CPAB and CPBA inputs load data
into the registers on the LOW-to-HIGH transition (see
Functional Description).
The LVTH16646 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These transceivers are designed for low-voltage (3.3V)
VCC applications, but with the capability to provide a TTL
interface to a 5V environment. The LVTH16646 is fabri-
cated with an advanced BiCMOS technology to achieve
high speed operation similar to 5V ABT while maintaining
low power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s Live insertion/extraction permitted
s Power Up/Down high impedance provides
glitch-free bus loading
s Outputs source/sink 32 mA/+64 mA
s Functionally compatible with the 74 series 16646
s Latch-up performance exceeds 500 mA
Ordering Code:
Order Number Package Number
Package Description
74LVTH16646MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
74LVTH16646MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2000 Fairchild Semiconductor Corporation DS012023
www.fairchildsemi.com

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74LVTH16646MTD equivalent
Absolute Maximum Ratings(Note 2)
Symbol
VCC
VI
VO
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
IIK DC Input Diode Current
IOK DC Output Diode Current
IO DC Output Current
ICC
IGND
TSTG
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
0.5 to +4.6
0.5 to +7.0
0.5 to +7.0
0.5 to +7.0
50
50
64
128
±64
±128
65 to +150
Conditions
Output in 3-STATE
Output in HIGH or LOW State (Note 3)
VI < GND
VO < GND
VO > VCC Output at HIGH State
VO > VCC Output at LOW State
Units
V
V
V
V
mA
mA
mA
mA
mA
°C
Recommended Operating Conditions
Symbol
Parameter
Min
Max
Units
VCC Supply Voltage
2.7 3.6
V
VI Input Voltage
0 5.5 V
IOH HIGH-Level Output Current
IOL LOW-Level Output Current
32
mA
64
TA Free-Air Operating Temperature
40 85
°C
t/V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
0 10 ns/V
Note 2: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 3: IO Absolute Maximum Rating must be observed.
5 www.fairchildsemi.com


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Featured Datasheets

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74LVTH16646MTDThe function is Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs. Fairchild SemiconductorFairchild Semiconductor

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