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PDF 74LVC2G66DC Data sheet ( Hoja de datos )
| Número de pieza | 74LVC2G66DC | |
| Descripción | Bilateral switch | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74LVC2G66
Bilateral switch
Rev. 01 — 29 June 2004
Product data sheet
1. General description
The 74LVC2G66 is a high-performance, low-power, low-voltage, Si-gate CMOS device.
The 74LVC2G66 provides two analog switches. Each switch has a input and output (pins
Y and Z) and an active HIGH enable input (pin E). When pin E is LOW, the analog switch
is turned off.
2. Features
s Wide supply voltage range from 1.65 V to 5.5 V
s Very low ON-resistance:
x 7.5 Ω (typical) at VCC = 2.7 V
x 6.5 Ω (typical) at VCC = 3.3 V
x 6 Ω (typical) at VCC = 5 V.
s High noise immunity
s Complies with JEDEC standard:
x JESD8-7 (1.65 V to 1.95 V)
x JESD8-5 (2.3 V to 2.7 V)
x JESD8-B/JESD36 (2.7 V to 3.6 V).
s ESD protection:
x HBM EIA/JESD22-A114-B exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V.
s CMOS low-power consumption
s Latch-up performance meets requirements of JESD78 Class I
s Direct interface with TTL levels
s Enable inputs accept voltages up to 5 V
s SOT505-2 and SOT765-1 package
s Specified from −40 °C to +85 °C and −40 °C to +125 °C.
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
Symbol Parameter
tPZH, tPZL turn-on time nE to VOS
Conditions
CL = 50 pF; RL = 500 Ω
VCC = 3 V
VCC = 5 V
Min Typ Max Unit
- 2.4 -
- 1.8 -
ns
ns
1 page  
Philips Semiconductors
74LVC2G66
Bilateral switch
Table 7: Recommended operating conditions …continued
Symbol Parameter
Conditions
Tamb
operating ambient
temperature
tr, tf input rise and fall times VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
Min
−40
[3] 0
[3] 0
Typ Max Unit
- +125 °C
- 20 ns/V
- 10 ns/V
[1] To avoid drawing VCC current out of terminal nZ, when switch current flows in terminal nY, the voltage drop
across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no VCC
current will flow out of terminal nY. In this case there is no limit for the voltage drop across the switch.
[2] For overvoltage tolerant switch voltage capability, see the 74LVCV2G66.
[3] Applies to control signal levels.
11. Static characteristics
Table 8: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ
Tamb = −40 °C to +85 °C [1]
VIH HIGH-level input
voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
0.65 × VCC -
1.7 -
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
2.0 -
0.7 × VCC -
VIL LOW-level input VCC = 1.65 V to 1.95 V
voltage
VCC = 2.3 V to 2.7 V
--
--
VCC = 2.7 V to 3.6 V
--
VCC = 4.5 V to 5.5 V
ILI input leakage current VI = 5.5 V or GND; VCC = 5.5 V
on control pin
--
- ±0.1
IS(OFF) analog switch
VI = VIH or VIL; |VS| = VCC − GND;
-
±0.1
OFF-state current
VCC = 5.5 V; see Figure 5
IS(ON)
analog switch
VI = VIH or VIL; |VS| = VCC − GND;
-
±0.1
ON-state current
VCC = 5.5 V; see Figure 6
ICC
∆ICC
quiescent supply
current
additional quiescent
supply current per
control pin
VI = VCC or GND; VS = GND or VCC;
IO = 0 A; VCC = 5.5 V
VI = VCC − 0.6 V; VS = GND or VCC;
IO = 0 A; VCC = 5.5 V
-
-
0.1
5
CI input capacitance
- 2.0
CS switch capacitance OFF-state
-5
ON-state
- 9.5
Tamb = −40 °C to +125 °C
VIH HIGH-level input
voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
0.65 × VCC -
1.7 -
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
2.0 -
0.7 × VCC -
Max Unit
-V
-V
-V
-V
0.35 × VCC V
0.7 V
0.8 V
0.3 × VCC V
±5 µA
±5 µA
±5 µA
10 µA
500 µA
- pF
- pF
- pF
-V
-V
-V
-V
9397 750 13259
Product data sheet
Rev. 01 — 29 June 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
5 of 22
5 Page 
Philips Semiconductors
74LVC2G66
Bilateral switch
Table 10: Dynamic characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); test circuit Figure 16.
Symbol Parameter
Conditions
Min Typ Max
tPHZ, tPLZ turn-off time nE to VOS
see Figure 15
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
1.0 -
1.0 -
1.0 -
1.0 -
1.0 -
11.5
7.0
8.5
8.0
6.5
[1] All typical values are measured at Tamb = 25 °C and nominal VCC.
[2] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + {(CL + CS) × VCC2 × fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = total load switching outputs;
CS = switch capacitance.
[3] The condition is VI = GND to VCC.
13. Waveforms
Unit
ns
ns
ns
ns
ns
nY or nZ
input
VI
GND
nZ or nY
output
VOH
VOL
VM
t PLH
VM
VM
t PHL
VM
001aaa541
Measurement points are given in Table 11.
Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 14. The input (nY, nZ) to output (nZ, nY) propagation delays and the output transition
times.
Table 11: Measurement points
Supply voltage
Input
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VM
0.5 × VCC
0.5 × VCC
1.5 V
3.0 V to 3.6 V
1.5 V
4.5 V to 5.5 V
0.5 × VCC
Output
VM
0.5 × VCC
0.5 × VCC
1.5 V
1.5 V
0.5 × VCC
9397 750 13259
Product data sheet
Rev. 01 — 29 June 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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